Supermicro A3SSV-8C-SPLN10F User Manual
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Supermicro A3SSV-8C-SPLN10F User Manual

Supermicro A3SSV-8C-SPLN10F User Manual

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A3SSV-8C-SPLN10F
A3SSV-16-SPLN10F
A3SSV-24C-SPLN10F
USER MANUAL
Revision 1.0

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Summary of Contents for Supermicro A3SSV-8C-SPLN10F

  • Page 1 A3SSV-8C-SPLN10F A3SSV-16-SPLN10F A3SSV-24C-SPLN10F USER MANUAL Revision 1.0...
  • Page 2 State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.
  • Page 3 M.2 B-Key, E-Key, and M-Key, five SATA 2.0 ports, 10 LAN ports, and the reliability/dependability of a Supermicro product. Please note that this motherboard is intended to be installed and serviced by professional technicians only. For processor/memory updates, please refer to our website at http://www.supermicro.com/products/.
  • Page 4 Super A3SSV-8C/16C/24C-SPLN10F User's Manual Contacting Supermicro Headquarters Address: Super Micro Computer, Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. Tel: +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: Marketing@supermicro.com (General Information) Sales-USA@supermicro.com (Sales Inquiries) Government_Sales-USA@supermicro.com (Gov. Sales Inquiries) Support@supermicro.com (Technical Support) RMA@supermicro.com...

  • Page 5: Table Of Contents

    Preface Table of Contents Chapter 1 Introduction 1.1 Checklist ..........................8 Quick Reference .......................11 Quick Reference Table ......................12 Motherboard Features .......................14 1.2 Processor Overview ......................18 1.3 Special Features ........................18 Recovery from AC Power Loss ..................18 1.4 System Health Monitoring ....................19 Onboard Voltage Monitors ....................19 Fan Status Monitor with Firmware Control ...............19 Environmental Temperature Control .................19 System Resource Alert......................19...
  • Page 6 Super A3SSV-8C/16C/24C-SPLN10F User's Manual 2.6 Connectors .........................37 Power Connections ......................37 Headers ..........................39 2.7 Jumper Settings .........................48 How Jumpers Work ......................48 2.8 LED Indicators ........................54 Chapter 3 Troubleshooting 3.1 Troubleshooting Procedures ....................56 Before Power On ......................56 No Power ..........................56 No Video ...........................56 System Boot Failure ......................57 Memory Errors ........................57 Losing the System's Setup Configuration .................58...
  • Page 7 Preface Appendix A BIOS Codes A.1 BIOS Error POST (Beep) Codes ..................109 A.2 Additional BIOS POST Codes ..................110 Appendix B Software Installation B.1 Supermicro SuperDoctor 5 ....................111 Appendix C Standardized Warning Statements Appendix D UEFI BIOS Recovery...

  • Page 8: Chapter 1 Introduction

    Introduction Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry. Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance. Please check that the following items have all been included with your motherboard. If anything listed here is damaged or missing, contact your retailer.
  • Page 9 Chapter 1: Introduction Figure 1-1. A3SSV-16C-SPLN10F Motherboard Image...
  • Page 10 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 FANA FAN3 FAN2 JLANLED2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...

  • Page 11: Quick Reference

    I-SATA5 I-SATA2 I-SATA3 JPW1 JPW1 I-SATA0 JMD1 :KEY-M PCIe2/SATA2 I-SATA1 JMD1 JMD3: KEY-E PCIe2/USB2 JMD3 JCPLD1 JSIM1 JPME2 A3SSV-8C-SPLN10F USB2/3 (2.0) JPV1 BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 JPT1 SRW3 SRW4 JSD1 JMD3_SRW1 JMD2 FANA FAN3 FAN2 JLANLED2...

  • Page 12: Quick Reference Table

    Super A3SSV-8C/16C/24C-SPLN10F User's Manual Quick Reference Table Jumper Description Default Setting JBM1 Disable IPMI Share LAN Pins 1-2 Open: Enable JBM2 Disable IPMI Dedicated LAN Pins 1-2 Open: Enabled JBT1 CMOS Clear Open: Normal JPF1 Power Force On Pins 1-2: ATX mode Pins 2-3: Force PS-ON mode (Default) JPG1 Onboard VGA Enable/Disable...
  • Page 13 Chapter 1: Introduction Connector Description JPH1 4-pin Power Connector (for one HDD system) Power Supply SMBus I C Header JPV1 8-pin 12V DC Power Connector JPW1 24-pin ATX Power Connector JRT3 Thermal Diode 1 JSD1 SATA DOM Power Connector JSDP1 Software-Defined Pins for LAN5–LAN6 JSDP2 Software-Defined Pins LAN1–LAN4...

  • Page 14: Motherboard Features

    • Intel® Atom SoC P5000 Series (FCBGA-2106) Processor Memory • Supports up to 256GB of RDIMM or 64GB of Non-ECC/ECC UDIMM DDR4 memory in four slots. • A3SSV-8C-SPLN10F: DDR4 2400MT/s • A3SSV-16C-SPLN10F: DDR4 2667MT/s • A3SSV-24C-SPLN10F: DDR4 2933MT/s DIMM Size •...
  • Page 15 Chapter 1: Introduction Motherboard Features Power Management • ACPI power management • CPU fan auto-off in sleep mode • Power button override mechanism • Power-on mode for AC power recovery System Health Monitoring • Onboard voltage monitors for CPU cores, +3.3V, +5V, +12V, +3.3V Stby, +5V Stby, VBAT, HT, Memory, system temperature, and memory temperature •...
  • Page 16 Note 2: For IPMI configuration instructions, please refer to the Embedded IPMI Con- figuration User's Guide available at http://www.supermicro.com/support/manuals/. Note 3: Supermicro ships standard products with a unique password for the BMC ADMIN user. This password can be found on a label on the motherboard. For general documentation and information on IPMI, please visit our website at https://www.super-...
  • Page 17 Chapter 1: Introduction Figure 1-4. Chipset Block Diagram CPLD SMBUS2 LCMXO2-1200HC AST2500 COM1/2 HEADER FAN X5 UART1/2 TACHOMETER RTL8211F RJ45 RGMII2 GIGALAN SVID VR13 HSIO[14],PCIe X1 USB 2.0[2] ESPI PCIe 3.0_x4 CPU, PCIe x4 PCIe X4 SLOT 6 DDR4 (CHA) DIMMA1,A2 8GT/s Intel SoC...

  • Page 18: Processor Overview

    Super A3SSV-8C/16C/24C-SPLN10F User's Manual 1.2 Processor Overview The Intel Atom P5000 series processor, with up to 24 cores at a 83W TDP on the A3SSV-8C/16C/24C-SPLN10F series, offers performance, reliability, and high intelligence. As a low-power system-on-chip motherboard, the A3SSV-8C/16C/24C-SPLN10F is optimized for a wide variety of networking workloads and applications.

  • Page 19: System Health Monitoring

    Chapter 1: Introduction 1.4 System Health Monitoring This section describes the health monitoring features of the A3SSV-8C/16C/24C-SPLN10F motherboard. The motherboard has an onboard Baseboard Management Controller (BMC) chip that supports system health monitoring. Once a voltage becomes unstable, a warning is given or an error message is sent to the screen.

  • Page 20: Acpi Features

    Super A3SSV-8C/16C/24C-SPLN10F User's Manual 1.5 ACPI Features The Advanced Configuration and Power Interface (ACPI) specification defines a flexible and abstract hardware interface that provides a standard way to integrate power management features throughout a computer system, including its hardware, operating system and application software.

  • Page 21: Chapter 2 Installation

    Chapter 2: Installation Chapter 2 Installation 2.1 Static-Sensitive Devices Electrostatic Discharge (ESD) can damage electronic com ponents. To prevent damage to your motherboard, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD. Precautions •...

  • Page 22: Motherboard Installation

    LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 FANA FAN3 FAN2 JLANLED2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...

  • Page 23: Installing The Motherboard

    Chapter 2: Installation Installing the Motherboard 1. Locate the mounting holes on the motherboard. See the previous page for the location. 2. Locate the matching mounting holes on the chassis. Align the mounting holes on the motherboard against the mounting holes on the chassis. 3.

  • Page 24: Memory Support And Installation

    Super A3SSV-8C/16C/24C-SPLN10F User's Manual 2.3 Memory Support and Installation Note: Refer to the motherboard product page for the list of supported memory Important: Exercise extreme care when installing or removing DIMM modules to pre- vent any possible damage. Memory Support The A3SSV-8C/16C/24C-SPLN10F motherboard supports up to 256GB of ECC RDIMM or 64GB of Non-ECC/ECC UDIMM DDR4 memory in four memory slots.

  • Page 25: Dimm Module Population Sequence

    JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 DIMMB1 DIMMB2 JPW1 DIMMA1 JMD1 :KEY-M PCIe2/SATA2 DIMMA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 FANA FAN3 FAN2 JLANLED2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...

  • Page 26: Dimm Installation

    2. Push the release tabs outwards on both JPW1 JMD1 :KEY-M PCIe2/SATA2 ends of the DIMM slot to unlock it. JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 3. Align the key of the DIMM module with the...

  • Page 27: Rear I/O Ports

    LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 FANA FAN3 FAN2 JLANLED2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 28 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 FANA FAN3 FAN2 JLANLED2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 29 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 30 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 31 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...

  • Page 32: Front Control Panel

    JF1 contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis. These connectors are designed specifically for use with Supermicro chassis. See the figure below for the descriptions of the front control panel buttons and LED indicators.
  • Page 33 Chapter 2: Installation Power Button The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both pins will power on/off the system. This button can also be configured to function as a suspend button (with a setting in the BIOS - see Chapter 4). To turn off the power when the system is in suspend mode, press the button for 4 seconds or longer.
  • Page 34 Super A3SSV-8C/16C/24C-SPLN10F User's Manual Overheat (OH)/Fan Fail Connect an LED cable to pins 7 and 8 to use the Overheat/Fan Fail LED connections. The LED on pin 8 provides warnings of overheat or fan failure. Refer to the tables below for pin definitions.
  • Page 35 Chapter 2: Installation HDD LED The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to show hard drive activity status. Refer to the table below for pin definitions. HDD LED Pin Definitions (JF1) Pin# Definition ID_UID/3.3V SB...
  • Page 36 Super A3SSV-8C/16C/24C-SPLN10F User's Manual NMI Button The non-maskable interrupt button header is located on pins 19 and 20 of JF1. Refer to the table below for pin definitions. NMI Button Pin Definitions (JF1) Pins Definition Ground 1. NMI Power Button Ground Reset Button Ground...

  • Page 37: Connectors

    LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 38 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...

  • Page 39: Headers

    LAN 5-6 JDB1 6. Speaker Header JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB...
  • Page 40 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 FANA FAN3 FAN2 JLANLED2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 41 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 FANA FAN3 FAN2 JLANLED2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 42 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 43 Port 80 connection. Use this header to enhance system performance and data security. Refer to the table below for pin definitions. Please go to the following link for more information on the TPM: http://www.supermicro.com/manuals/other/TPM.pdf. Trusted Platform Module Header Pin Definitions...
  • Page 44 JTPM1 7. JMD1 JVR1 JPF1 SRW1 JSDP2 8. JMD2 9. JMD3 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB...
  • Page 45 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 46 JFPCLED1 is the 1GbE RJ45 link and activity LED header. Attach a cable from this header to the Supermicro LED board (Part Number: FPB-FPE300-LED10) to display the status of the RJ45 LAN link and activity LED. The LED board FPB-FPE300-LED10 is reserved for use on the E300 chassis.
  • Page 47 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 FANA JLANLED2 FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...

  • Page 48: Jumper Settings

    Super A3SSV-8C/16C/24C-SPLN10F User's Manual 2.7 Jumper Settings How Jumpers Work To modify the operation of the motherboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board. See the diagram below for an example of jumping pins 1 and 2.
  • Page 49 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 50 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 51 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 52 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 53 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...

  • Page 54: Led Indicators

    LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...
  • Page 55 LEDT2 LAN 5-6 JDB1 JBT1 JTPM1 JVR1 JPF1 SRW1 JSDP2 JPW1 JMD1 :KEY-M PCIe2/SATA2 JMD3: KEY-E PCIe2/USB2 JCPLD1 JSIM1 A3SSV-8C-SPLN10F BIOS LICENSE JPV1 DESIGNED IN USA REV:1.02 JSD1 SRW3 SRW4 JMD3_SRW1 JLANLED2 FANA FAN3 FAN2 JRT3 JSFPLED1 JLANLED3 FANB FAN1...

  • Page 56: Chapter 3 Troubleshooting

    Super A3SSV-8C/16C/24C-SPLN10F User's Manual Chapter 3 Troubleshooting 3.1 Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/ or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any non hot-swap hardware components.

  • Page 57: System Boot Failure

    Chapter 3: Troubleshooting 3. Remove all memory modules and turn on the system (if the alarm is on, check the specs of memory modules, reset the memory or try a different one). System Boot Failure If the system does not display POST or does not respond after the power is turned on, check the following: 1.

  • Page 58: Losing The System's Setup Configuration

    Super A3SSV-8C/16C/24C-SPLN10F User's Manual Losing the System's Setup Configuration 1. Make sure that you are using a high-quality power supply. A poor-quality power supply may cause the system to lose the CMOS setup information. Refer to Section 2-7 for details on recommended power supplies. 2.
  • Page 59 Chapter 3: Troubleshooting 3. Use the minimum configuration for troubleshooting: Remove all unnecessary components (starting with add-on cards first), and use the minimum configuration (but with the CPU and a memory module installed) to identify the trouble areas. Refer to the steps listed in Section A above for proper troubleshooting procedures.

  • Page 60: Technical Support Procedures

    Before contacting Technical Support, please take the following steps. Also, please note that as a motherboard manufacturer, Supermicro also sells motherboards through its channels, so it is best to first check with your distributor or reseller for troubleshooting services. They should know of any possible problems with the specific system configuration that was sold to you.

  • Page 61: Frequently Asked Questions

    Note: The SPI BIOS chip used on this motherboard cannot be removed. Send your motherboard back to our RMA Department at Supermicro for repair. For BIOS Recovery instructions, please refer to the AMI BIOS Recovery Instructions posted at http://www.

  • Page 62: Battery Removal And Installation

    Super A3SSV-8C/16C/24C-SPLN10F User's Manual 3.4 Battery Removal and Installation Battery Removal To remove the onboard battery, follow the steps below: 1. Power off your system and unplug your power cable. 2. Locate the onboard battery as shown below. 3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to unlock it.

  • Page 63: Returning Merchandise For Service

    Shipping and handling charges will be applied for all orders that must be mailed when service is complete. For faster service, RMA authorizations may be requested online (http://www.supermicro.com/ support/rma/). This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alteration, misuse, abuse or improper maintenance of products.

  • Page 64: Chapter 4 Uefi Bios

    Super A3SSV-8C-SPLN10F User's Manual Chapter 4 UEFI BIOS 4.1 Introduction This chapter describes the AMIBIOS™ Setup utility for the motherboard. The BIOS is stored on a chip and can be easily upgraded using a flash program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual.

  • Page 65: Main Setup

    Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00. The date's default value is the BIOS build date after RTC reset. Supermicro A3SSV BIOS Version This feature displays the version of the BIOS ROM used in the system.
  • Page 66 Super A3SSV-8C-SPLN10F User's Manual CPLD Version This feature displays the Complex Programmable Logic Device version. Memory Information Total Memory This feature displays the total size of memory available in the system.

  • Page 67: Advanced

    Chapter 4: BIOS 4.3 Advanced Use the arrow keys to select the Advanced menu and press <Enter> to access the menu features. Warning: Take caution when changing the Advanced settings. An incorrect value, a very high DRAM frequency, or an incorrect DRAM timing setting may make the system unstable. When this occurs, revert to default manufacturer settings.
  • Page 68 Super A3SSV-8C-SPLN10F User's Manual Re-try Boot If this feature is enabled, the BIOS will automatically reboot the system from a specified boot device after its initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot. Power Configuration Watch Dog Function If enabled, the Watch Dog Timer will allow the system to reset or generate NMI based on jumper settings when it is expired for more than five minutes.
  • Page 69 Chapter 4: BIOS • Processor Max Ratio • Processor Min Ratio • Microcode Revision • L1 Cache RAM (Per Core) • L2 Cache RAM (Per Package) • L3 Cache RAM (Per Package) • Processor 0 Version CPU1 Core Disable Bitmap CPU1 Core Disable Bitmap Core Disable Bitmap(Hex) Select 0 to enable all cores or FFFFFFFFFFF to disable all cores.
  • Page 70 Super A3SSV-8C-SPLN10F User's Manual Enable SMX Use this feature to enable or disable Safer Mode Extensions. The options are Disable and Enable. PPIN Control Select Unlock/Enable to use the Protected Processor Inventory Number (PPIN) in the system. The options are Lock/Disable and Unlock/Enable.
  • Page 71 Chapter 4: BIOS CPU C State Control Enable Monitor MWAIT Select Enabled to enable the Monitor/Mwait instructions. The Monitor instructions moni- tors a region of memory for writes, and MWait instructions instruct the CPU to stop until the monitored region begins to write. The options are Disable and Enable. CPU C6 Report Select Enable to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating system.
  • Page 72 Super A3SSV-8C-SPLN10F User's Manual • Number of IIO • Current UPI Link Speed • Current UPI Link Frequency • Global MMIO Low Base / Limit • Global MMIO High Base / Limit • Pci-e Configuration Base / Size XPT Prefetch Use this feature to enable or disable Extended Prediction Table (XPT) Remote Prefetch.
  • Page 73 Chapter 4: BIOS Memory Frequency Use this feature to set the maximum memory frequency for onboard memory modules. The options are Auto, 2133, 2200, 2400, 2600, 2666, 2800, 2933, 3000, and 3200. Data Scrambling for DDR4 Use this feature to enable or disable data scrambling for DDR4 memory. The options are Disable and Enable.
  • Page 74 Super A3SSV-8C-SPLN10F User's Manual IIO Configuration   CPU1 Configuration IOU0 (IIO PCIe Port 1) Use this feature to select the PCIe port bifurcation for this slot. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.  Onboard Lan I350 Controller Link Speed Use this feature to select the link speed for the PCIe port.
  • Page 75 Chapter 4: BIOS PCIe Port Max Payload Size Selecting Auto for this feature enables the motherboard to automatically detect the maximum Transaction Layer Packet (TLP) size for the connected PCIe device, allowing for maximum I/O efficiency. Selecting 128B or 256B designates maximum packet size of 128 or 256.
  • Page 76 Super A3SSV-8C-SPLN10F User's Manual Interrupt Remapping Use this feature to enable Interrupt Remapping support, which detects and controls external interrupt requests. The options are Auto, Enable, and Disable. PCIe ASPM Support (Global) Use this feature to enable or disable ASPM support for all donwstream devices. The options are Disable and Auto.
  • Page 77 Chapter 4: BIOS • Current State • Error Code PCH SATA Configuration  SATA Controller This feature enables or disables the onboard SATA controller supported by the Intel PCH chip. The options are Enabled and Disabled. Aggressive LPM Support When this feature is set to Enable, the SATA AHCI controller manages the power usage of the SATA link.
  • Page 78 Super A3SSV-8C-SPLN10F User's Manual M.2 KEY-B This feature displays the information of drives detected by the BIOS. Network Configuration  Network Stack Select Enabled to enable Preboot Execution Environment (PXE) or Unified Extensible Firmware Interface (UEFI) for network stack support. The options are Disabled and Enabled.
  • Page 79 Chapter 4: BIOS  Enter Configuration Menu Interface Name Interface Type MAC Address Host addresses Route Table Gateway addresses DNS addresses Interface ID Use this feature to set the 64-bit alternative interface ID for the device. DAD Transmit Count If this set feature is set to 0, the Duplication Address Detection is not performed. Set the value to a preferred selection.
  • Page 80 Super A3SSV-8C-SPLN10F User's Manual Save Changes and Exit Select this feature to save the changes for the features above and exit. PCIe/PCI/PnP Configuration  PCI Bus Driver Version PCI Devices Common Settings: Above 4G Decoding (Available if the system supports 64-bit PCI decoding) Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.
  • Page 81 Chapter 4: BIOS CPU SLOT7 PCIe 3.0 X8 OPROM Use this feature to select which firmware type to be loaded for the add-on card in this slot. The options are Disabled and EFI. CPU SLOT6 PCIe 3.0 X4 OPROM Use this feature to select which firmware type to be loaded for the add-on card in this slot. The options are Disabled and EFI.
  • Page 82 Super A3SSV-8C-SPLN10F User's Manual Serial Port 2 Configuration This submenu allows you to configure the settings of Serial Port 2. Serial Port 2 Select Enabled to enable the selected onboard serial port. The options are Disabled and Enabled. Device Settings This feature displays the I/O and IRQ addresses.
  • Page 83 Chapter 4: BIOS Bits Per Second Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600, and 115200 (bits per second).
  • Page 84 Super A3SSV-8C-SPLN10F User's Manual Putty KeyPad This feature selects the settings for Function Keys and KeyPad used for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SC0, ESCN, and VT400. Redirection After BIOS POST Use this feature to enable or disable legacy console redirection after BIOS POST.
  • Page 85 Chapter 4: BIOS Stop Bits A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2. Flow Control Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow.
  • Page 86 Super A3SSV-8C-SPLN10F User's Manual *If the feature above is set to Enabled, the following features are available for configuration: Console Redirection Settings This feature allows you to specify how the host computer will exchange data with the client computer, which is the remote computer.
  • Page 87 Chapter 4: BIOS WHEA Support Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and provide a common infrastructure for the system to handle hardware errors within the Windows OS environment to reduce system crashes and to enhance system recovery and health monitoring.
  • Page 88 Disable Block Sid Use this feature to disable or enable Block SID. The options are Enabled and Disabled. SMCI BIOS-Based TPM Provision Support Use this feature to enable Supermicro TPM Provision support. The options are Disabled and Enabled. Intel Trusted Execution Technology Intel Trusted Execution Technology (TXT) helps protect against software-based attacks and ensures protection, confidentiality, and integrity of data stored or created on the system.
  • Page 89 Chapter 4: BIOS Select IPv4 or IPv6 Use this feature to select which LAN port to boot from. The options are IPv4 and IPv6. Boot Description Highlight the feature and press enter to create a boot description. The description cannot be more than 75 characters.
  • Page 90 Super A3SSV-8C-SPLN10F User's Manual NIC Configuration Link Speed Use this feature to specify the port speed used for the selected boot protocol. The options are Auto Negotiated, 10 Mbps Half, 10 Mbps Full, 100 Mbps Half, and 100 Mbps Full.
  • Page 91 Chapter 4: BIOS Firmware Image Properties Option ROM version Unique NVM/EEPROM ID NVM Version NIC Configuration Link Speed Use this feature to specify the port speed used for the selected boot protocol. The options are Auto Negotiated, 10 Mbps Half, 10 Mbps Full, 100 Mbps Half, and 100 Mbps Full. Wake On LAN Select Enabled for wake on LAN support, which allows the system to wake up when an onboard LAN device receives an incoming signal.
  • Page 92 Super A3SSV-8C-SPLN10F User's Manual TLS Authentication Configuration  This submenu allows you to configure Transport Layer Security (TLS) settings. Server CA Configuration Enroll Certification Enroll Certification Using File Use this feature to enroll certification from a file. Certification GUID Use this feature to input the certification GUID.
  • Page 93 Chapter 4: BIOS Intel(R) I350 Gigabit Network Connection Intel(R) I350 Gigabit Network Connection Intel(R) PRO/1000 9.8.06 PCIe  Intel(R) I350 Gigabit Network Connection Intel(R) I350 Gigabit Network Connection Intel(R) 100GbE 4.0.12  Intel(R) Ethernet Connection E822-C for SFP Intel(R) Ethernet Connection E822-C for SFP ...

  • Page 94: Bmc

    Super A3SSV-8C-SPLN10F User's Manual 4.4 BMC Use this menu to configure BMC settings. BMC Firmware Revision This feature displays the IPMI firmware revision used in your system. IPMI STATUS This feature displays the status of the IPMI firmware installed in your system.
  • Page 95 Chapter 4: BIOS When SEL is Full This feature allows you to decide what the BIOS should do when the system event log is full. Select Erase Immediately to erase all events in the log when the system event log is full. The options are Do Nothing and Erase Immediately.
  • Page 96 Super A3SSV-8C-SPLN10F User's Manual Gateway IP Address This feature displays the Gateway IP address for this computer. The address can be manually entered. This should be in decimal and in dotted quad form (i.e., 172.31.0.1). VLAN Use this feature to enable or disable the IPMI VLAN function. The options are Disable and Enable.

  • Page 97: Event Logs

    Chapter 4: BIOS 4.5 Event Logs Use this menu to configure Event Log settings. Change SMBIOS Event Log Settings Enabling/Disabling Options SMBIOS Event Log Change this feature to enable or disable all features of the SMBIOS Event Logging during system boot. The options are Disabled and Enabled. Erasing Settings Erase Event Log If No is selected, data stored in the event log will not be erased.
  • Page 98 Super A3SSV-8C-SPLN10F User's Manual SMBIOS Event Log Standard Settings Log System Boot Event This option toggles the System Boot Event logging to enabled or disabled. The options are Disabled and Enabled. MECI The Multiple Event Count Increment (MECI) counter counts the number of occurences that a duplicate event must happen before the MECI counter is incremented.

  • Page 99: Security

    Chapter 4: BIOS 4.6 Security Use this menu to configure the security settings for the system. Administrator Password Press Enter to create a new, or change an existing, Administrator password. Password Check Select Setup for the system to check for a password at Setup. Select Always for the system to check for a password at boot up or upon entering the BIOS Setup utility.
  • Page 100 Erase - PSID, and Security Erase - Wtihout Password. Password Use this feature to set a password for the Supermicro HDD Security Function. Lockdown Mode Use this feature to put the BIOS into lockdown mode. The options are Enabled and Disabled.
  • Page 101 Chapter 4: BIOS  Key Management This submenu allows you to configure the following Key Management settings.  Restore Factory Keys Force System to User Mode. Install factory default Secure Boot key databases. The op- tions are Yes and No. ...
  • Page 102 Super A3SSV-8C-SPLN10F User's Manual  Restore DB defaults Select Yes to restore the DB defaults. Secure Boot Variable  Platform Key (PK) Update Select Yes to load the new Platform Keys (PK) from the manufacturer's defaults. Select No to load the Platform Keys from a file. The options are Yes and No.
  • Page 103 Chapter 4: BIOS Append Select Yes to add the dbx from the manufacturer's defaults to the existing dbx. Select No to load the dbx from a file. The options are Yes and No.  Authorized TimeStamps Update Select Yes to load the dbt from the manufacturer's defaults. Select No to load the dbt from a file.

  • Page 104: Boot

    Super A3SSV-8C-SPLN10F User's Manual 4.7 Boot Use this menu to configure Boot settings. • Boot Option #1 • Boot Option #2 • Boot Option #3 • Boot Option #4 • Boot Option #5 • Boot Option #6 • Boot Option #7 •...
  • Page 105 Chapter 4: BIOS UEFI NETWORK Drive BBS Priorities  This feature sets the system boot order of detected devices. UEFI Application Boot Priorities  This feature sets the system boot order of detected devices. • Boot Option #1...

  • Page 106: Save & Exit

    Super A3SSV-8C-SPLN10F User's Manual 4.8 Save & Exit Use this menu to save settings and exit from the BIOS. Save Options Discard Changes and Exit Select this option to quit the BIOS Setup without making any permanent changes to the system configuration, and reboot the computer.
  • Page 107 Chapter 4: BIOS Restore Optimized Default To set this feature, select Restore Defaults from the Save & Exit menu and press <Enter>. These are factory settings designed for maximum system stability, but not for maximum performance. Save As User Defaults To set this feature, select Save as User Defaults from the Save &...
  • Page 108 Super A3SSV-8C-SPLN10F User's Manual (B236/D0/F1) UEFI PXE IPv4: Intel(R) Ethernet Connection E822-C for SFP (MAC:xxxxxxxxxxxx) (B236/D0/F1) UEFI PXE IPv6: Intel(R) Ethernet Connection E822-C for SFP (MAC:xxxxxxxxxxxx) (B236/D0/F4) UEFI PXE IPv6: Intel(R) Ethernet Connection E822-C 1GbE (MAC:xxxxxxxxxxxx) (B236/D0/F5) UEFI PXE IPv6: Intel(R) Ethernet Connection E822-C 1GbE...
  • Page 109 Appendix A: BIOS Codes Appendix A BIOS Codes A.1 BIOS Error POST (Beep) Codes During the Power-On Self-Test (POST) routines, which are performed upon each system boot, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue to boot. These error messages normally appear on the screen.
  • Page 110 Super A3SSV-8C/16C/24C-SPLN10F User's Manual A.2 Additional BIOS POST Codes The AMI BIOS supplies additional checkpoint codes, which are documented online at http:// www.supermicro.com/support/manuals/ ("AMI BIOS POST Codes User's Guide"). For information on AMI updates, please refer to http://www.ami.com/products/.
  • Page 111 Software Installation B.1 Supermicro SuperDoctor 5 The Supermicro SuperDoctor 5 is a hardware monitoring program that functions in a command- line or web-based interface in the Linux operating systems. The program monitors system health information, such as CPU temperature, system voltages, system power consumption, and fan speed, and provides alerts via email or the Simple Network Management Protocol (SNMP).
  • Page 112 The following statements are industry standard warnings, provided to warn the user of situations which have the potential for bodily injury. Should you have questions or experience difficulty, contact Supermicro's Technical Support department for assistance. Only certified technicians should attempt to install or configure components.
  • Page 113 Appendix C: Standardized Warning Statements Attention Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer que par une pile de type semblable ou équivalent, recommandée par le fabricant. Jeter les piles usagées conformément aux instructions du fabricant. ¡Advertencia! Existe peligro de explosión si la batería se reemplaza de manera incorrecta.
  • Page 114 Super A3SPI-4C/8C-LN6PF/HLN4F User's Manual Product Disposal Warning! Ultimate disposal of this product should be handled according to all national laws and regulations. 製品の廃棄 この製品を廃棄処分する場合、 国の関係する全ての法律 ・ 条例に従い処理する必要があります。 警告 本产品的废弃处理应根据所有国家的法律和规章进行。 警告 本產品的廢棄處理應根據所有國家的法律和規章進行。 Warnung Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen des Landes erfolgen.
  • Page 115 Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue. Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall Supermicro be liable for direct, indirect, special, incidental, or consequential damages arising from a BIOS update. If you need to update the BIOS, do not shut down or reset the system while the BIOS is updating to avoid possible boot failure.
  • Page 116 USB device or a writable CD/DVD. Note 1: If you cannot locate the "Super.ROM" file in your driver disk, visit our website www.supermicro.com to download the BIOS package. Extract the BIOS binary im- age into a USB flash device and rename it "Super.ROM" for the BIOS recovery use.
  • Page 117 Appendix D: UEFI BIOS Recovery Note 2: Before recovering the main BIOS image, confirm that the "Super.ROM" bi- nary image file you download is the same version or a close version meant for your motherboard. 2. Insert the USB device that contains the new BIOS image ("Super.ROM") into your USB drive and power on the system 3.
  • Page 118 Super A3SSV-8C/16C/24C-SPLN10F User's Manual 4. When the screen as shown above displays, use the arrow keys to select the item "Proceed with flash update" and press the <Enter> key. You will see the BIOS recovery progress as shown in the screen below: Note: Do not interrupt the BIOS flashing process until it has completed.
  • Page 119 Appendix D: UEFI BIOS Recovery 8. When the UEFI Shell prompt appears, type fs# to change the device directory path. Go to the directory that contains the BIOS package you extracted earlier from Step 6. Enter flash.nsh BIOSname.### at the prompt to start the BIOS update process. Note: Do not interrupt this process until the BIOS flashing is complete.

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