Cirrus Logic CS2200-CP Manual

Fractional-N Frequency Synthesizer
Features
Delta-Sigma Fractional-N Frequency Synthesis

– Generates a Low Jitter 6 - 75 MHz Clock
from an 8 - 75 MHz Reference Clock
Highly Accurate PLL Multiplication Factor

– Maximum Error Less Than 1 PPM
I²C / SPI™ Control Port

Configurable Auxiliary Output

– Buffered Reference Clock
– PLL Lock Indication
– Duplicate PLL Output
Flexible Sourcing of Reference Clock

– External Oscillator or Clock Source
– Supports Inexpensive Local Crystal
Minimal Board Space Required

– No External Analog Loop-filter
Components
I²C/SPI Software
Control
8 MHz to 75 MHz
Low-Jitter Timing
Reference
http://www.cirrus.com
I²C / SPI
Phase
Comparator Loop Filter
Fractional-N
Delta-Sigma
Output to Input
Clock Ratio
Cirrus Logic Confidential
Copyright  Cirrus Logic, Inc. 2009–2015
(All Rights Reserved)
General Description
The CS2200-CP is an extremely versatile system clock-
ing device that utilizes a programmable phase lock loop.
The CS2200-CP is based on an analog PLL architec-
ture comprised
Frequency Synthesizer. This architecture allows for fre-
quency synthesis and clock generation from a stable
reference clock.
The CS2200-CP supports both I²C and SPI for full soft-
ware control.
The CS2200-CP is available in a 10-pin MSOP package
in Commercial (-10°C to +70°C) and Automotive-D
(-40°C to +85°C) and Automotive-E (-40°C to +105°C)
grades.
Customer development kits are also available for device
evaluation. Please see
page 25 for complete details.
3.3 V
Timing Reference
PLL Output
PLL Lock Indicator
Internal Voltage Controlled
Oscillator
Divider
N
Modulator
CS2200-CP
of a Delta-Sigma Fractional-N
"Ordering Information" on
Auxiliary
Output
6 to 75 MHz
PLL Output
OCT '15
DS759F3