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DSP96002ADM User’s Manual Motorola, Incorporated Semiconductor Products Sector Wireless Division 6501 William Cannon Drive West Austin, TX 78735-8598...
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Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.
Quick Start Guide Overview OVERVIEW The Motorola Application Development System is a tool used to design and test complex software applications and hardware products using a specific Motorola DSP chip. The related Application Development Modules (ADMs) contain the DSP chip and related hardware used for bench development and test.
INSTALLATION PROCEDURE Installation requires the following steps: 1. Using information provided in the Motorola Application Development System User’s Manual, install the Motorola Application Development System in the host computer. 2. Prepare the DSP96002ADM board 3. Connect the board to the external Command Converter card...
– Always transport sensitive components in anti-static packaging. Locate the twenty-seven jumper blocks JG1–JG27 on the DSP96002ADM board, as shown in Figure 1-1 on page 1-6. Table 1-1 describes the default jumper and switch settings when shipped from the factory.
Connecting the DSP96002ADM to the PC and Power Figure 1-2 shows the interconnection diagram for connecting the PC and the external power supply to the DSP96002ADM board. Using the instructions in the Application Development System User’s Manual, connect the Command Converter to the ADM board.
DSP96002ADM Description and Features DSP96002ADM DESCRIPTION AND FEATURES The DSP96002ADM has various options to facilitate evaluation of the different features of the chip. These options are outlined in this chapter. Figure 2-1 on page 2-4 shows a block diagram of the DSP96002ADM architecture. To achieve zero wait accesses memory decoding is minimal, therefore memory may overlap into other address blocks within a $20000000 address space.
Memory Decoder Decoder Program/ Program/ X data/ X data/ Y data Y data SRAM SRAM Program Program EPROM EPROM Port A Data Port B Data Port A Address Port B Address Figure 2-1 DSP96002ADM Functional Block Diagram DSP96002ADMUM/AD, Preliminary MOTOROLA...
DSP96002ADM Technical Summary DSP96002 Description DSP96002 DESCRIPTION A full description of the DSP96002, including functionality and user information is provided in the following documents included as a part of this kit (either as printed copies or on the documentation CD-ROM): •...
DSP96002ADM Technical Summary Configuring the DSP96002ADM CONFIGURING THE DSP96002ADM There are twenty-seven jumper options on the DSP96002ADM. Figure 2-2 illustrates the physical locations of jumpers JG1 to JG27. Table 2-1 on page 2-7 defines the different Jumper Group functions. JG15...
DSP96002ADM Technical Summary Configuring the DSP96002ADM 2.4.1 Operating Mode Selection Jumpers JG1 to JG3 are used to select one of eight operating modes in which the DSP96002 exits reset. The ADM is factory configured for MODE 0. In MODE 0, the internal program memory occupies the lower portion of the program memory space.
DSP96002ADM Technical Summary Configuring the DSP96002ADM 2.4.2 External IRQA/IRQB/IRQC Input Path The paths for the external input signals MODA/IRQA, MODB/IRQB, and MODC/IRQC are selected by JG4, JG5, and JG6, respectively. These jumpers allow the designer to use the multiplexed function of these inputs, or to select only the interrupt function of these external signals.
DSP96002ADM Technical Summary Configuring the DSP96002ADM 2.4.3 DSP96002 Port A/B User EPROM Decoders Port A and B both contain sockets that accommodate EPROMs of various densities. Six types of EPROMs, ranging from 2 K × 8 to 64 K × 8, may be installed in the sockets. The lower density EPROMs come in 24-pin packages while the higher density EPROMs are available in 28-pin packages.
4 or 256 K 4 device will work with the DSP96002ADM. The SRAM decoder does not have bus arbitration signals as qualifiers; therefore, any processor that becomes the bus master may directly access the SRAMs. This is useful in shared memory configurations. The SRAM address lines are buffered to decrease the DSP96002 address bus loading.
DSP96002ADM Technical Summary Configuring the DSP96002ADM 2.4.5 Clock Input Selection Using jumper JG20, the user can select either the ADM U21 clock output or an external clock input via P1 connector P1-C30 pin as the DSP96002 clock source. The ADM clock is buffered via U6-3 (74AS08 AND Gate), which provides a current source of –2 mA and a...
DSP96002ADM Technical Summary DSP96002 ADM Connector Descriptions Table 2-9 DSP96002 ADM P1/J3 Port A Connector (Continued) PIN # ROW A ROW B ROW C +5 V +5 V +5 V Note: (n/c) means that the pin is not connected.. Both P1 and J3 are plugs.
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DSP96002ADM Technical Summary DSP96002 ADM Connector Descriptions Table 2-10 DSP96002 ADM P2/J4 Port B Connector (Continued) PIN # ROW A ROW B ROW C bD28 MODC/IRQC bA28 bD29 RESET bA29 bD30 bA30 bD31 +5 V bA31 Note: (n/c) means that the pin is not connected. Both P2 and J4 are plugs.
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APPENDIX A DSP96002ADM SCHEMATICS MOTOROLA DSP96002ADMUM/AD...