Samsung S23A750D Service Manual page 54

5. Wiring Diagram
Location Block
LVDS connector
1
between the 1st and 2nd
floors
2
FPGA
3
DDR3
Scaler
4
B to B connector
5
between the 1st and 2nd
floors
6
DP
HDMI
7
LED Driver
8
Flash
9
Function + Bluetooth
10
FAN
11
5-4
Connects the LVDS signal from the 1st floor to the 2nd floor
Receives and bypasses the LVDS 4 channel input, creates the 148.5MHz
output, and puts the output into the M180 system clock on the 2nd floor
Starts the scaler
This main IC receives the external input and displays pictures on the screen.
Transmits the signals between the 1st and 2nd floors
Stands for Display Port and offers a higher input port performance than a DVI
Connects to an AV device or PC
Turns on the backlight of the LED panel
This IC is where MICOMs for the scaler and FPGA are saved.
Connects the Function Assy and BT module
Starts the fan
Functions