Cpu Configuration - Gigabyte H262-P61 User Manual

Hpc server – ampere altra max - arm server - dp 2u 4-nodes
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2-3-1 CPU Configuration

Parameter
CPU Configuration
Number of processors/cores
enabled
Inter Socket Connection:
Link0/1
Inter Socket Connection Speed
Configured
Enable number of cores
ARM ERRATA 1542419
workaround
ANC mode
Near atomic
SLC Replacement Policy
Description
Displays the number of installed processor information.
Displays the Inter socket connection information.
Controls Link speed for Inter socket connection.
Options available: Default, 16GT/s, 20GT/s, 25GT/s. Default setting is
Default.
Enable number of cores for the system. Default setting is Default.
Options available: Disable I-Cache coherency, Software solution,
Disable. Default setting is Disable I-Cache coherency.
Options available: Monolithic, Hemisphere, Quadrant. Default setting is
Monolithic.
Enable/Disable cacheable atomic instruction executed near in CPU.
Options available: Enabled, Disabled. Default setting is Enabled.
Options available: Enhanced Least Recently Used, Linear-Feedback
Shift Register. Default setting is Enhanced Least Recently Used.
BIOS Setup
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