Sony SS-TS500 Service Manual page 63

Pin No. Pin Name
55 VCC
56 CKSW1
57 OCSW1
58 CS0X
59 CS1X
60 CS2X
61 CS3X
62 CS4X
63 CS5X
64 C
65 CS6X
66 CS7X
67 XWAIT
68 BGRNTX
69 BRQ
70 XRD
71 XWRH
72 XWRL
73 XMIX
74 HSTX
75 VSS
76 XFRRST
77 CPUCK
78 OCSW2
79 XDACK
80 VESCS/X39CS
81 48/44.1K
82 WIDE
83 MAMUTE
84 XLDON
85 to 100 HD0 -15
101 VSS
102 to 109 HA0 - 7
110 VCC
111 to 118 HA8 - 15
119 VSS
120 HA16
I/O
– Power supply
I Chucking switch (Tray SW1) signal input
I Open/Close switch (Tray SW2) signal input
O Chip select signal output to external ROM
– Not used
O Chip select signal output to AVD SDRAM
O Chip select signal output to AVD R-BUS
O Chip select signal output to IC302(CXD8635R/ARP)
O Chip select signal output to IC302(CXD8635R/SDSP)
– Terminal for built-in regulator bypass capacitor
O FGA CS output
– Not used
I external WAIT signal input
I External bus open aclnowledge signal input (pull-up)
I External bus open request signal input
O External bus read enable signal output
O Write signal output for upper byte
O Write signal output for lower byte
– Not used
– Not used (pull-up)
– Ground
I Reset signal input
O CPU clock output
I Tray switch signal input
– Not used (pull-up)
– Not used (pull-up)
O PLL IC control signal output
O Video wide offset control signal output
I IFOK signal input from IC901(CPU)
O Laser diode mute control signal output
I/O External data bus bits 0 - 15
– Ground
O Address signal output
– Power supply
O Address signal output
– Ground
O Address signal output
HCD-S500/S800
Description
61