Tpa3003D2; General Description; Features; Pinning - Hitachi 17LD4220 Service Manual

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11.9. TPA3003D2

11.9.1. General Description

The TPA3003D2 is a 3-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied stereo
speakers. The TPA3003D2 can drive stereo speakers as low as 8 Ω. The high efficiency of the TPA3003D2
eliminates the need for external heatsinks when playing music. Stereo speaker volume is controlled with a dc
voltage applied to the volume control terminal offering a range of gain from –40 dB to 36 dB.

11.9.2. Features

3-W/Ch Into an 8-Ω Load From 12-V Supply
Efficient, Class-D Operation Eliminates Heatsinks and Reduces Power Supply Requirements
32-Step DC Volume Control From −40 dB to 36 dB
Third Generation Modulation Techniques − Replaces Large LC Filter With Small Low-Cost Ferrite Bead Filter
Thermal and Short-Circuit Protection

11.9.3. Pinning

TERMINAL
I/O
NAME
NO.
AGND
9, 10, 26
AVCC
33
O
AVDD
29
O
AV
REF
7
DD
BSLN
13
I/O
BSLP
24
I/O
BSRN
48
I/O
BSRP
37
I/O
COSC
28
I/O
FADE
30
LINN
6
LINP
5
LOUTN
16, 17
O
LOUTP
20, 21
O
MUTE
34
NC
31, 32, 35
PGNDL
18, 19
PGNDR
42, 43
PVCCL
14, 15
PVCCL
22, 23
PVCCR
38,39
PVCCR
46, 47
REFGND
12
RINP
3
RINN
2
ROSC
27
I/O
ROUTN
44, 45
O
ROUTP
40, 41
O
SD
1
VCLAMPL
25
VCLAMPR
36
17" TFT TV Service Manual
Analog ground for digital/analog cells in core
High-voltage analog power supply (8.5 V to 14 V)
5-V Regulated output
5-V Reference output—provided for connection to adjacent VREF terminal.
Bootstrap I/O for left channel, negative high-side FET
Bootstrap I/O for left channel, positive high-side FET
Bootstrap I/O for right channel, negative high-side FET
Bootstrap I/O for right channel, positive high-side FET
I/O for charge/discharging currents onto capacitor for ramp generator triangle wave biased at V2P5
I
Input for controlling volume ramp rate when cycling SD or during power-up. A logic low on this pin
places the amplifier in fade mode. A logic high on this pin allows a quick transition to the desired
volume setting.
I
Negative differential audio input for left channel
I
Positive differential audio input for left channel
Class-D 1/2-H-bridge negative output for left channel
Class-D 1/2-H-bridge positive output for left channel
I
A logic high on this pin disables the outputs. A low on this pin enables the outputs.
Not internally connected
Power ground for left channel H-bridge
Power ground for right channel H-bridge
Power supply for left channel H-bridge (tied to pins 22 and 23 internally), not connected to PVCCR or
AV
.
CC
Power supply for left channel H-bridge (tied to pins 14 and 15 internally), not connected to PVCCR or
AV
.
CC
Power supply for right channel H-bridge (tied to pins 46 and 47 internally), not connected to PVCCL
or AV
.
CC
Power supply for right channel H-bridge (tied to pins 38 and 39 internally), not connected to PVCCL
or AV
.
CC
Ground for gain control circuitry. Connect to AGND. If using a DAC to control the volume, connect the
DAC ground to this terminal.
I
Positive differential audio input for right channel
I
Negative differential audio input for right channel
Current setting resistor for ramp generator. Nominally equal to 1/8*V
Class-D 1/2-H-bridge negative output for right channel
Class-D 1/2-H-bridge positive output for right channel
I
Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with compliance to V
Internally generated voltage supply for left channel bootstrap capacitors.
Internally generated voltage supply for right channel bootstrap capacitors.
DESCRIPTION
13
CC
21/09/2004
.
CC

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