JVC GZ-MG27US Service Manual page 52

MAIN(DSP MEM) SCHEMATIC DIAGRAM
TO SUB CPU,CDS/TG FLSH_RST
REG_3.1V
TO MPEG2,V I/O
SREG2.5V
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-19(No.YF133)
L4302
OPEN
L4303
NQR0154-003X
C4304
OPEN
T
GND
IC4304
R1114N251B-X
2.5V
1 VDD VOUT 5
C4351
C4352
1 2 GND 1
3 CE NC 4
LAST NO. VACANT NO.
IC 4304
L 4303
R 4303
RA 4304
C 4352 4311-4350
L4301
NQR0129-002X
C4301
4.7
C4305
4.7
16 15 13 14 35 34 12 33 46 45 11 32 31 10 44 43 30 9 29 28 7 8 6
IC4301
SP32J55BFI12D03
[4M FLASH_MEMORY]
17 18 20 19 36 37 21 38 47 42 22 39 48 40 23 41 25 24 26 27 2 1 3
RA4301 100k SDR_DQ31
F880[2]
1 8
RA4301 100k SDR_DQ30
CF PORT POWERUP
2 7
RA4301 100k SDR_DQ29
CF PORT POWERUP
3 6
RA4302 100k SDR_DQ28
USB PORT POWERUP
3 6
RA4302 100k SDR_DQ27
CF PORT POWERUP
1 8
RA4302 100k SDR_DQ26
CF PORT POWERUP
4 5
RA4301 100k SDR_DQ25
CPU SELECT
4 5
RA4302 100k SDR_DQ24
F89E[6]
2 7
RA4303 100k SDR_DQ23
F89E[5:3]
4 5
RA4304 100k SDR_DQ22
F89E[5:3]
1 8
RA4303 100k SDR_DQ21
F89E[5:3]
1 8
RA4303 100k SDR_DQ20
RESERVED
3 6
RA4303 100k SDR_DQ19
MEMORY WIDTH FOR FLAS
01: 16bit
2 7
RA4304 100k SDR_DQ18
MEMORY WIDTH FOR FLAS
3 6 01: 16bit
RA4304 100k SDR_DQ17
F880[1]
2 7
RA4304 100k SDR_DQ16
F880[0]
4 5
5
4
R4301
47k