LG 49UF640 -ZA Series Service Manual page 78

Chassis : ld59r / ld5zr
Table of Contents

Advertisement

[51P Vx1
output wafer]
51pin_Wafer
P7100
SP14-11592-01-51Pin
52
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
1
2
TXDAP7_L
3
TXDAN7_L
4
5
TXDAP6_L
6
TXDAN6_L
7
8
TXDAP5_L
9
TXDAN5_L
10
11
TXDAP4_L
12
TXDAN4_L
13
14
TXDAP3_L
15
TXDAN3_L
16
17
TXDAP2_L
18
TXDAN2_L
+3.3V_NORMAL
19
20
TXDAP1_L
+3.3V_NORMAL
21
TXDAN1_L
22
R7104
10K
23
OPT
TXDAP0_L
24
TXDAN0_L
25
M+ MODULE : low
26
LOCKAn_IN
*Pin30(DATA_FORMAT)
HIGH : 2 DIVISION
27
HTPDAn_IN
LOW : NON DIVISION
Module_LGD_SHARP_CSHOT
28
R7101
10K
29
30
OPT
31
*Pin31(BIT_SEL)
R7102
10K
HIGH or NC : 10Bit
32
LOW : 8Bit
33
34
R7108
0
35
3D&L_DIM_EN
OPT
36
37
38
39
40
41
42
43
*Pin38
CSOT, LGD60Hz, INX : N/C
44
SHARP,LGD120Hz : GND
GPLUS : PWM_TIN
45
Module_LGD120Hz_SHARP
46
R7123
10K
47
R7113
0
PWM_TIN
48
Module_MPLUS
49
50
PANEL_VCC
51
L7100
MLB-201209-0120P-N2
51pin_12V
C7100
C7101
10uF
10uF
25V
25V
51pin_12V
51pin_12V
HTPDAn_Video
HTPDAn_OSD
R174
R173
10K
10K
*moved from SHT1.
3D&L_DIM_EN_Micom
D
R7106
DIODES_LGD/INX_Module_TCON_I2C_EN_FET(SUB)
1K
Q7100-*1
G
2N7002K
EBK42767801
R7125
0
3D&L_DIM_EN
S
3D&L_DIM_EN_Micom
TCON_I2C_EN
L_DIM_EN_pulldown
R7107
1K
+3.3V_NORMAL
EBK62072501
Module_LGD_INX_CSHOT_MPLUS
R7121
R7115
4.7K
Q7100
OPT
2N7002KA
KEC_LGD/INX_Module_TCON_I2C_EN_FET(MAIN)
R7119
Module_LGD_INX_CSHOT_MPLUS
33 OPT
AR7101
0
1/16W
TCON_I2C_EN
+3.3V_NORMAL
Module_LGD_INX_CSHOT_MPLUS
R7122
0
R7116
4.7K
OPT
Q7101
2N7002KA
EBK62072501
KEC_LGD/INX_Module_TCON_I2C_EN_FET(MAIN)
R7120
33 OPT
+3.3V_NORMAL
M+ MODULE
*Pin36(GPLUS_MODE)
R7109
HIGH : High luminance
10K
LOW or NC : Low Power
OPT
LM14A : INTERNAL PULL-UP.
R7126
0
DATA_FORMAT_1_SOC
Module_MPLUS
Module_LGD120Hz
LGD_Module_120Hz
AR7100
R7110
0
10K
1/16W
Data_Format_1
Data_Format_0
+3.3V_NORMAL
R7111
10K
OPT
R7100
0
PWM_TOUT
Module_MPLUS
Module_LGD120Hz_MPLUS
R7112
10K
+3.3V_NORMAL
LOCKAn_HTPDAn_3.3VPullup
LOCKAn_HTPDAn_3.3VPullup
R7136
+1.8V
R7132
10K
10K
LOCKAn
LOCKAn_HTPDAn_3.3VPullup
R7134
C
10K
LOCKAn_HTPDAn_3.3VPullup
B
Q7105
R7128
2N3904S
KEC_LOCKAn_HTPDAn_3.3VPullup_TR
10K
E
LOCKAn_HTPDAn_3.3VPullup
C
C
R7130
100
B
Q7103
B
Q7105-*1
2N3904S
MMBT3904(NXP)
LOCKAn_IN
KEC_LOCKAn_HTPDAn_3.3VPullup_TR
NXP_LOCKAn_HTPDAn_3.3VPullup_TR
E
E
C
B
Q7103-*1
MMBT3904(NXP)
NXP_LOCKAn_HTPDAn_3.3VPullup_TR
E
+3.3V_NORMAL
LOCKAn_HTPDAn_3.3VPullup
LOCKAn_HTPDAn_3.3VPullup
R7135
+1.8V
R7131
10K
10K
HTPDAn
LOCKAn_HTPDAn_3.3VPullup
R7133
C
10K
LOCKAn_HTPDAn_3.3VPullup
B
Q7104
R7127
2N3904S
KEC_LOCKAn_HTPDAn_3.3VPullup_TR
10K
E
LOCKAn_HTPDAn_3.3VPullup
C
C
R7129
100
B
Q7102
B
Q7104-*1
2N3904S
MMBT3904(NXP)
HTPDAn_IN
KEC_LOCKAn_HTPDAn_3.3VPullup_TR
NXP_LOCKAn_HTPDAn_3.3VPullup_TR
E
E
C
B
Q7102-*1
MMBT3904(NXP)
NXP_LOCKAn_HTPDAn_3.3VPullup_TR
E
0
I2C_SCL6
I2C_SDA6
D
DIODES_LGD/INX_Module_TCON_I2C_EN_FET(SUB)
Q7101-*1
G
2N7002K
EBK42767801
S
Data Input Format[1:0]
*Mode 1 (NON Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = Low
*Mode 3 (4 Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = High
BSD-15Y-LM14A-071_00-HD
LM14A
2015-01-29
71
Vx1 51P
LGE Internal Use Only

Advertisement

Table of Contents
loading

Table of Contents