1 HP Vectra 500 Series
Principal Components and Features
Data Integrity
The processor uses a number of techniques to maintain data integrity. It
employs two methods of error detection:
• Data Parity Checking
This is supported on a byte-by-byte basis, generating parity bits for data
addresses sent out of the microprocessor. These parity bits are not used
by the external subsystems.
• Internally
The processor uses functional redundancy checking to provide maximum
error detection of the processor and its interface.
PCI Chip Set
The chip set consists of three devices:
• The PCI, Cache, and Memory Controller (82437FX)
• Two Data Path Units (82438FX)
• The PCI/ISA bridge and IDE controller (82371FB)
The 82437FX and 82438FX2 devices provide the core cache and memory
system architecture, and the PCI interface.
10