MSI H97M-E35 Series Manual page 30

(ms-7846 v3.x) micro-atx motherboard
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Hardware Prefetcher [Enabled]
Enables or disables the hardware prefetcher (MLC Streamer prefetcher).
[Enabled]
Allows the hardware prefetcher to automatically pre-fetch
data and instructions into L2 cache from memory for tuning
the CPU performance.
[Disabled]
Disables the hardware prefetcher.
Adjacent Cache Line Prefetch [Enabled]
Enables or disables the CPU hardware prefetcher (MLC Spatial prefetcher).
[Enabled]
Enables adjacent cache line prefetching for reducing the
cache latency time and tuning the performance to the specific
application.
[Disabled]
Enables the requested cache line only.
CPU AES Instructions [Enabled]
Enables or disables the CPU AES (Advanced Encryption Standard-New
Instructions) support. This item appears when a CPU supports this function.
[Enabled]
Enables Intel AES support.
[Disabled]
Disables Intel AES support.
Intel Adaptive Thermal Monitor [Enabled]
Enables or disables the Intel adaptive thermal monitor function to protect the
CPU from overheating.
[Enabled]
Throttles down the CPU core clock speed when the CPU is
over the adaptive temperature.
[Disabled]
Disables this function.
Intel C-State [Enabled]
C-state is a processor power management technology defined by ACPI.
[Auto]
This setting will be configured automatically by BIOS.
[Enabled]
Detects the idle state of system and reduce CPU power
consumption accordingly.
[Disabled]
Disable this function.
CE Support [Disabled]
Enables or disables the CE function for power-saving in halt state. This item
appears when "Intel C-State" is enabled.
[Enabled]
Enables CE function to reduce the CPU frequency and
voltage for power-saving in halt state.
[Disabled]
Disables this function.
Package C State limit [Auto]
This item allows you to select a CPU C-state mode for power-saving when
system is idle. This item appears when "Intel C-State" is enabled.
[Auto]
This setting will be configured automatically by BIOS.
[C0~C7s]
The power-saving level from high to low is C7s, C7, C6, C3,
C2, then C0.
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