Synchronous Dac Load; Counter - Measurement Computing USB-3100 Series User Manual

USB-3105 User's Guide
Pull up and pull down configuration area available using the DIO CTL terminal block pin 54. The
Note 4:
pull down configuration requires the DIO CTL pin (pin 54) to be connected to a DGND pin (pin
50, 53 or 55). For a pull up configuration, the DIO CTL pin should be connected to the +5V
terminal pin (pin 56).

Synchronous DAC Load

Parameter
Pin name
Power on and reset state
Pin type
Termination
Software selectable direction
Input clock rate
Clock pulse width
Input leakage current
Input high voltage
Input low voltage
Output high voltage (Note 5)
Output low voltage (Note 6)
Note 5: SYNCLD is a Schmitt trigger input and is over-current protected with a 200 Ohm series resistor.
When SYNCLD is in input mode, the analog outputs may either be updated immediately or when
Note 6:
a positive edge is seen on the SYNCLD pin (this is under software control.) However, the pin
must be at a low logic level in order for the DAC outputs to be updated immediately. If an
external source is pulling the pin high, no update will occur.

Counter

Parameter
Pin name
Number of channels
Resolution
Counter type
Input type
Counter read/writes rates
(software paced)
Schmidt trigger hysteresis
Input leakage current
Input frequency
High pulse width
Low pulse width
Input high voltage
Input low voltage
Table 7. SYNCLD I/O specifications
Conditions
Output
Input
Input
Output
IOH = –2.5 mA
No load
IOL = 2.5 mA
No load
Table 8. CTR I/O specifications
Conditions
Counter read
Counter write
19
Specification
SYNCLD (terminal block pin 49)
Input
Bidirectional
Internal 100K ohms pull-down
Outputs internal D/A LOAD signal.
Receives D/A LOAD signal from external source.
100 Hz max
1 µs min
5 µs min
±1.0 µA typ.
4.0 V min, 5.5 V absolute max
1.0 V max, –0.5 V absolute min
3.3 V min
3.8 V min
1.1 V max
0.6 V max
Specification
CTR
1
32-bits
Event counter
TTL, rising edge triggered
System dependent, 33 to 1000 reads per second.
System dependent, 33 to 1000 reads per second.
20 mV to 100 mV
±1.0 µA typ.
1 MHz max.
500 nS min.
500 ns min.
4.0 V min, 5.5 V absolute max
1.0 V max, –0.5 V absolute min
Specifications