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BQ25120F3A 700-nA Low I

1 Features

Increases system operation time between charges
– Configurable 300-mA buck regulator
(1.8-V default)
– 700-nA (typical) Iq with buck converter enabled
(no load)
– Configurable load switch or 100-mA LDO
output (LDO by default. VLDO 1.8-V)
– Up to 300-mA charge current for fast charging.
2
I
C programmable up to 200 mA, external
resistor setting for 200 mA to 300 mA.
– 0.5% Accurate battery voltage regulation
(configurable from 3.6 V to 4.65 V in 10-mV
steps) 4.35-V default
– Configurable termination current down to
500 µA
– Simple voltage based battery monitor
– Watchdog timer disabled
– TS WARM fault disabled (no reduction in
battery regulation voltage)
Highly integrated solution with small footprint
– 2.5-mm x 2.5-mm WCSP Package and six
external components for minimal solution
– Push-button wake-up and reset with adjustable
timers
– Power path management for powering the
system and charging the battery
– Power path management enables <50 nA Ship
Mode battery quiescent current for longest shelf
life
– Battery charger operates from 3.4 V – 5.5 V
(5.5-V OVP / 20-V tolerant)
– Dedicated pins for input current limit, charge
current, termination current, and status output
2
I
C communication control
– Charge voltage and current
– Termination threshold
– Input current limit
– VINDPM Threshold
– Timer options
– Load switch control
– System output voltage adjustment
– LDO output voltage adjustment
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Highly Integrated Battery Charge Management Solution
Q
for Wearables and IoT

2 Applications

Smart watches and other wearable devices
Fitness accessories
Health monitoring medical accessories
Rechargeable toys

3 Description

The BQ25120F3A is a highly integrated battery
charge management IC that integrates the most
common functions for wearable devices: Linear
charger, regulated output, load switch, manual reset
with timer, and battery voltage monitor. The integrated
buck converter is a high efficiency, low I
using DCS-Control
down to 10-µA load currents. The low quiescent
current during operation and shutdown enables
maximum battery life. The device supports charge
currents from 5 mA to 300 mA.
PART NUMBER
BQ25120F3A
(1)
IN
SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021
that extends light load efficiency
Device Information
PACKAGE
DSBGA (25)
For all available packages, see the orderable addendum at
the end of the data sheet.
PG
IN
BQ2512x
GND
CD
HOST
SDA
SCL
INT
RESET
LSCTRL
MR
IPRETERM
ISET
ILIM
Simplified Schematic
BQ25120F3A
switcher
Q
(1)
BODY SIZE (NOM)
2.50 mm x 2.50 mm
Unregulated
PMID
Load
VINLS
SYS
MCU /
SW
SYSTEM
LS / LDO
<100mA
Load
BAT
TS
NTC
IN
Copyright © 2016, Texas Instruments Incorporated

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Summary of Contents for Texas Instruments BQ25120F3A

  • Page 1: Features

    (no load) 3 Description – Configurable load switch or 100-mA LDO The BQ25120F3A is a highly integrated battery output (LDO by default. VLDO 1.8-V) charge management IC that integrates the most – Up to 300-mA charge current for fast charging.
  • Page 2: Table Of Contents

    NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision * (October 2018) to Revision A (January 2021) Page • Changed status from restricted to public......................Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 3: Description (Continued)

    1.2 V Load Switch 4.2 V 11 mA 0.5 mA Enabled Enabled BQ25125 Disabled 1.8 V 1.8 V (LDO) 4.2 V 10 mA 2 mA Disabled Enabled Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 4: Pin Configuration And Functions

    ISET reflects the actual charging current and can be used to monitor charge current if an ISET resistor is present and the device is not in host mode. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 5 Battery Pack NTC Monitor. Connect TS to the center tap of a resistor divider from VIN to GND. The NTC is connected from TS to GND. TS faults are reported by the I C interface during charge mode. Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 6: Specifications

    Any voltage greater than shown should be a transient event. These inputs will support 6.6 V for less than 10% of the lifetime at V or VIN, with a reduced current and/or performance. (BAT) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 7: Thermal Information

    12.0 °C/W Junction-to-case (bottom) thermal resistance °C/W θJC(bot) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 8: Electrical Characteristics

    MOSFET on-resistance Operating in voltage regulation, Programmable Range, 10- Charge Voltage 4.65 mV steps (BATREG) = 25°C –0.5% 0.5% Voltage Regulation Accuracy = 0°C to 85°C –0.5% 0.5% Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 9 0 mA < I < 100 mA –1% Load Transient 2 µA to 100 mA, VOUT = 1. 8 V –120 FET Rdson = 3.6 V mΩ DS(ON_LDO) (VINLS) Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 10 OVP threshold voltage Deglitch time, VIN OVP falling below V , 1V/us DGL_OVP falling Thermal trip > V °C SHTDWN UVLO Thermal hysteresis > V °C UVLO Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 11 = 3.3 V 0.25 * V IL(/CD_LSCTRL) (PULLUP) Input high threshold = 3.3 V 0.75 * V IH(/CD_LSCTRL) (PULLUP) Internal pull-down kΩ PULLDOWN/CD resistance Internal pull-down MΩ (LSCTRL) resistance Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 12: Timing Requirements

    Transition time required to enable the I HIZ_ACTIVEBAT interface from HiZ to Active BAT INPUT PIN Deglitch for CD CD rising/falling µs /CD_DGL Input quiet time for Ship Mode transition QUIET Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 13 Conditions: PGB_MRS = 0, TE = 1, SW_LDO = 1, VINDPM_ON = 0, PG and INT pulled up to SYS, EN_INT = 1 Figure 8-1. Typical Start-Up Timing and Operation Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links:...
  • Page 14 Conditions: SW_LDO = 1, MRREC = 1, PG and INT pulled up to SYS, ISYS = 10 µA, EN_INT = 1 Figure 8-2. Battery Operation and Sleep Mode Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 15: Typical Characteristics

    -40 -25 -10 110 125 Temperature (qC) D019 Temperature (qC) D025 Figure 8-8. V Accuracy vs Temperature (BATREG) Figure 8-7. Battery Discharge FET R vs Temperature DS(ON) Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 16 110 125 Frequency (Hz) Temperature (qC) D028 D027 Figure 8-14. LS/LDO PSRR vs Frequency = 5 V Figure 8-13. R of Low Side MOSFET vs Temperature DS(ON) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 17: Detailed Description

    SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 9 Detailed Description 9.1 Overview The following sections describe in detail the functions provided by the BQ25120F3A. These include linear charger, PWM output, configurable LS/LDO output, Push-button input, reset timer, functional modes, battery monitor, I C configurability and functions, and safety features.
  • Page 18: Feature Description

    C Command QUIET t > t RESET xxxxxx xxxxxx Shipmode Write Figure 9-2. CD, MR and VIN Sequencing for Ship Mode Entry Through Long MR Button Press Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 19 VBMON_READ to see the battery voltage under a known load. The register will be updated and can be read 2ms after a read is initiated. The VBMON voltage threshold is Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback...
  • Page 20 C and the sleep condition no longer exists. It is not recommended to do a battery connection or plug in when V < VIN < V as it may cause higher quiescent current to be UVLO drained form the battery. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 21 PMID falls below the supplement mode threshold. Battery termination is disabled while in DPPM mode. In order to charge the battery, the voltage at PMID has to be greater than threshold. BATREG DPPM Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 22 ICHG setting will be used after being in Host mode, the IPRETERM registers should be set to match the desired external threshold for the highest ICHG accuracy. Termination is disabled when any loop other than CV is active. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 23 INT pin and the STAT and FAULT bits of the status registers are updated over I C. The CD pin or power must be toggled in order to clear the safety timer fault. The safety timer duration is programmable Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links:...
  • Page 24 The BQ25120F3A has the warm region disabled for applications that need charging to suspend beyond 45°C by adjusting the Rhi and Rlo resistors. Refer to the setup guide tool...
  • Page 25 Equation 3 Equation (LO) (HI) COOL% (COOL) (LO) (LO) (HI) COOL% COOL% (LO) (HI) WARM% (WARM) (LO) (LO) (HI) WARM% WARM% Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 26 ESR capacitors. During PWM mode, it operates in continuous conduction mode, with a frequency up to 2 MHz. If the load current decreases, the converter enters a power save mode to maintain high efficiency down Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 27 2.0 x 1.2 x 1.0 MDT2012CH2R2N TOKO Small size, high efficiency 0.23 2.0 x 1.2 x 1.0 MIPSZ2012 2R2 0.225 2.0 x 1.6 x 1.0 74438343022 Wurth Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 28 If the output of the LDO is less than the programmed V voltage, connect VINLS to SYS. If the output of the (SYS) LDO is greater than the programmed V voltage, connect VINLS to PMID. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 29 The MRRESET_VIN register can be configured to have RESET asserted by a button press only, or by a button press and V present (V < V < V UVLO Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 30: Device Functional Modes

    Disabled to fault, interrupt on INT Update VINDPM_STAT, Enabled, input VINDPM Update STAT to fault, interrupt Enabled (if enabled) Enabled (if enabled) Enabled current reduced on INT Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 31 ^ }Œ ^HZ_DK ^!^ -> Not ^y^ -> Event caused by external influence ^Event| ^ -> describes the event with a specific condition condition Figure 9-5. State Diagram Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 32: Programming

    The data transfer protocol for standard and fast modes is exactly the same; therefore, they are referred to as the F/S-mode in this document. The device only supports 7-bit addressing. The device 7-bit address is 6A (8-bit shifted address is D4). Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 33 Data Output by Transmitter Not Acknowledge Data Output by Receiver Acknowledge SCL From Master Clock Pulse for Acknowledgement START Condition Figure 9-9. Acknowledge on the I C Bus Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 34 0xFFh being read out. Recognize START or Recognize STOP or REPEATED START REPEATED START Condition Condition Generate ACKNOWLEDGE Signal Acknowledgement Signal From Slave Address Figure 9-10. Bus Protocol Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 35: Register Maps

    SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 9.6 Register Maps 9.6.1 Status and Ship Mode Control Register Memory location 0x00h, Reset State: xx0x xxx1 (BQ25120F3A) Figure 9-11. Status and Ship Mode Control Register 7 (MSB) 0 (LSB) Write Only LEGEND: R/W = Read/Write;...
  • Page 36 BQ25120F3A www.ti.com SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 9.6.2 Faults and Faults Mask Register Memory location 0x01h, Reset State: xxxx 0000 (BQ25120F3A) Figure 9-12. Faults and Faults Mask Register 7 (MSB) 0 (LSB) LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 9-13.
  • Page 37 BQ25120F3A www.ti.com SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 9.6.3 TS Control and Faults Masks Register Memory location 0x02h, Reset State: 1xxx 1000 (BQ25120F3A) Figure 9-13. TS Control and Faults Masks Register (02) 7 (MSB) 0 (LSB) LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 9-14.
  • Page 38 BQ25120F3A www.ti.com SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 9.6.4 Fast Charge Control Register Memory location 0x03h, Reset State: 1000 0000 (BQ25120F3A) Figure 9-14. Fast Charge Control Register 7 (MSB) 0 (LSB) LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 9-15.
  • Page 39 BQ25120F3A www.ti.com SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 9.6.5 Termination/Pre-Charge and I C Address Register Memory location 0x04h, Reset State: 1001 0010 (BQ25120F3A) Figure 9-15. Termination/Pre-Charge and I C Address Register 7 (MSB) 0 (LSB) LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 9-16.
  • Page 40 CODE x 10 mV. The charge voltage range is from 3.6 V to 4.65 V. If a value greater than 4.65 V is written, the setting goes to BREG 4.65 V. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 41 BQ25120F3A www.ti.com SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 9.6.7 SYS VOUT Control Register Memory location 0x06h, Reset State: 1010 1010 (BQ25120F3A) Figure 9-17. SYS VOUT Control Register 7 (MSB) 0 (LSB) LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 9-18.
  • Page 42 1010 2.333 1011 2.417 1100 1101 2.583 1110 2.667 1111 2.75 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 43 BQ25120F3A www.ti.com SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 9.6.8 Load Switch and LDO Control Register Memory location 0x07h, Reset State: 0010 1000 ( BQ25120F3A) Figure 9-18. Load Switch and LDO Control Register 7 (MSB) 0 (LSB) LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 9-20.
  • Page 44 BQ25120F3A www.ti.com SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 9.6.9 Push-button Control Register Memory location 0x08h, Reset State: 0100 00xx (BQ25120F3A) Figure 9-19. Push-button Control Register 7 (MSB) 0 (LSB) LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 9-21.
  • Page 45 BQ25120F3A www.ti.com SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 9.6.10 ILIM and Battery UVLO Control Register Memory location 0x09h, Reset State: 0000 1011 (BQ25120F3A) Figure 9-20. ILIM and Battery UVLO Control Register 7 (MSB) 0 (LSB) Write LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 9-22.
  • Page 46 00 000. The VBMON_READ bit can be used to initiate a new reading by writing a 1 to it. Example: A reading of 10 011 indicated a VBAT voltage of between 84% and 86% of the VBATREG setting. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 47 BQ25120F3A www.ti.com SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 9.6.12 VIN_DPM and Timers Register Memory location 0x0Bh, Reset State: 0100 0010 (BQ25120F3A) Figure 9-22. VIN_DPM and Timers Register 7 (MSB) 0 (LSB) LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 9-24.
  • Page 48: Application And Implementation

    A typical design is shown in Figure 10-1. This design uses the BQ25120F3A with external resistors for ILIM, IPRETERM, and ISET. These are not needed if these values are set with a host controller through I commands. This design also shows the TS resistors, which is also optional.
  • Page 49: Typical Application

    HOST 1 µF Load RESET LSCTRL 1 µF IPRETERM ISET 14.3 kŸ ILIM 14 kŸ 4.99 kŸ BQ25120F3A 499 Ÿ 4 kŸ Figure 10-1. Typical Application Circuit Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 50 = 200 AΩ / 0.4 A = 500 Ω (13) ILIM Select the closest standard value, which in this case is 499 Ω. Connect this resistor between ILIM pin and GND. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 51 The voltage at TS is monitored to determine that the battery is at a safe temperature during charging. Refer to Section 8 for the detailed thresholds number. The TS circuit is shown in Figure 9-4. The resistor values can be calculated using Equation 1 Equation Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 52 Figure 10-4. Entering DPPM Mode Figure 10-5. Exiting DPPM Mode Time 4 ms/div Time 4 ms/div Figure 10-6. Entering Battery Supplement Mode Figure 10-7. Exiting Battery Supplement Mode Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 53 BQ25120F3A www.ti.com SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021 Time 2 ms/div Time 4 ms/div Figure 10-8. Charger On/Off Using CD Figure 10-9. OVP Fault Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 54 Load Current (A) D003 D013 = 25°C = 3.3 V = 25°C = 1.2 V Figure 10-15. 1.2 V Load Regulation Figure 10-14. 3.3 V System Efficiency Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 55 VBAT Voltage (V) D005 D002 = 25°C = 1.5 V = 25°C = 1.2 V Figure 10-21. 1.5 V Line Regulation Figure 10-20. 1.2 V Line Regulation Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 56 Time 40 s/div Time 40 s/div = 10 µA = 100 mA LOAD LOAD Figure 10-26. Light Load Operation Showing SW Figure 10-27. Light Load Operation Showing SW Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 57 Time 4 s/div = 300 mA = 1.2 V LOAD Figure 10-32. Light Load Operation Showing SW Figure 10-33. 1.2 V Load Transient, 0 to 50 mA Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 58 Time 4 s/div = 1.2 V = 1.8 V Figure 10-38. 1.2 V Load Transient, 0 to 200 mA Figure 10-39. 1.8 V Load Transient, 0 to 200 mA Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 59 Figure 10-43. Startup Showing SS on SYS in PWM = 3.3 V Mode Figure 10-42. 3.3 V Load Transient, 0 to 200 mA Time 20 ms/div Figure 10-44. Short Circuit and Recovery for SYS Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 60 = 1.8 V = 2.5 V SLSDO SLSDO Figure 10-49. 1.8 V Load Transient, 0 to 10 Figure 10-50. 2.5 V Load Transient, 0 to 10 LSLDO LSLDO Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 61 = 2.5 V = 3.3 V SLSDO SLSDO Figure 10-55. 2.5 V Load Transient, 0 to 100 Figure 10-56. 3.3 V Load Transient, 0 to 100 LSLDO LSLDO Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 62 10.2.3.4 LS/LDO Output Curves Time 400 s/div Time 20 ms/div Figure 10-58. Short Circuit and Recovery for LDO Figure 10-57. Startup Showing SS on LS/LDO in LDO Mode Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 63 Time 200 ms/div Wake1 = 500 ms Wake2 = 1 s Wake1 = 50 ms Wake2 = 1.5 s Figure 10-63. Show MR Timing Figure 10-64. Show MR Timing Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 64: Power Supply Recommendations

    11 Power Supply Recommendations It is recommended to use a power supply that is capable of delivering 5 V at the input current limit set by the BQ25120F3A. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BQ25120F3A...
  • Page 65: Layout

    Place the GNDs of the PMID and IN caps close to each other. • Don’t route so the power planes are interrupted. 12.2 Layout Example Figure 12-1. BQ25120F3A Layout Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: BQ25120F3A...
  • Page 66: Device And Documentation Support

    Use. 13.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
  • Page 67 Ball material (4/5) BQ25120F3AYFPR ACTIVE DSBGA 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 BQ25120F3A BQ25120F3AYFPT ACTIVE DSBGA RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 BQ25120F3A The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
  • Page 68 PACKAGE OPTION ADDENDUM www.ti.com 7-May-2021 Addendum-Page 2...
  • Page 69 PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2021 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) BQ25120F3AYFPR DSBGA 3000 180.0 2.65 2.65 0.69 BQ25120F3AYFPT DSBGA 180.0...
  • Page 70 PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2021 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) BQ25120F3AYFPR DSBGA 3000 182.0 182.0 20.0 BQ25120F3AYFPT DSBGA 182.0 182.0 20.0 Pack Materials-Page 2...
  • Page 71 PACKAGE OUTLINE YFP0025 DSBGA - 0.5 mm max height SCALE 8.000 DIE SIZE BALL GRID ARRAY BALL A1 CORNER 0.30 0.25 0.5 MAX SEATING PLANE 0.19 0.05 C 1.6 TYP 0.13 SYMM SYMM D: Max = 2.56 mm, Min = 2.5 mm 0.4 TYP E: Max =...
  • Page 72 OPENING SOLDER MASK NON-SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4225306/A 09/2019 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. See Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009). www.ti.com...
  • Page 73 EXAMPLE STENCIL DESIGN YFP0025 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.4) TYP (R0.05) TYP 25X ( 0.25) (0.4) TYP METAL SYMM SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE: 40X 4225306/A 09/2019 NOTES: (continued) 4.
  • Page 74 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2022, Texas Instruments Incorporated...

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