Philips 50PUT8215/56 Service Manual page 62

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9-5-10 DCDC-SYSTEM-POWER3
Main_12V
VIN < 5.5V to trigger mute=Low.
R4116
100K 1%
R4115
22K 1%
Main_12V
+5V-STANDBY
C4126
C4164
10UF 25V
100NF 16V
C4128
C4129
C4101
10UF 6.3V
10uF 6.3V
100NF 16V
+3V3-STANDBY
C4150
C4103
1.2 x (1+64.9K/20K) = 5.09V
10uF 10V
100NF 16V
+3V3-AVDD
R4122
C4114
45.3K 1%
NC/100NF 16V
R4121
10K 1%
+3V3-STANDBY
+3V3-STANDBY
R4135
10K 5%
R4136
TP4100
10K 5%
TP4101
MUTE_CTL:
LO = > MUTE
HI = > UN-MUTE
A_MUTE:
HI = > UN-MUTE
LO = > MUTE
DDRV DE-CAP.
DDRV
Bottom side of Main Chip
CM53
CM36
CM236
CM230
CM233
1uF 6.3V
1uF 6.3V
1uF 6.3V
1uF 6.3V
10UF 6.3V
CD59
CD52
CM248
CM229
CM254
4.7UF 6.3V
100NF 16V
100NF 16V
100NF 16V
100NF 16V
U4100
RT5090C
28
33
BOOT1
VCC
27
UGATE1
C4131
4.7UF 6.3V
26
PHASE1
25
LGATE1
32
VDET
29
VIN1
C4117
C4123
C4105
100NF 16V
10uF 16V
NC/10UF 10% 16V
9
10
VIN2
LX2
23
11
VIN3
LX2
24
VIN3
8
VIN4
40
VIN_LDO
18
+5V-STANDBY
LX3
19
C4120
NC/100NF 16V
LX3
20
LX3
30
21
R4120
64.9K 1/10W
FB1
LX3
R4119
20K 1%
DDRV_FB
13
VSEN2
CPU_GPU_P
GND_FB
14
RGND2
15
17
R4102
Buck3_ACFB
VSEN3
LG3
0R05 OHM
0.6 x (1+45.3K/10K) = 3.3V
3
6
FB4
LX4
7
LX4
OPWRSB_N
R4100
0R05 OHM
36
EN_CTRL
5
Hi : Normal
VLDO
Lo : Standby
NC/100NF 16V
4
37
FB_LDO
SOC_REST
12
VIN1_OK
2
TP4103
MUTE_CTL
R4104
0R05 OHM
MUTE_IN
16
INT#
A_MUTE
1
TP4102
R4106
NC/0R05 OHM
MUTE_OUT#
35
38
R4117
VCAP
SCL
39
R4118
SDA
31
22
ENTRIP
NC
C4151
C4152
10uF 16V
NC/10UF 16V
41
PGND
R4105
34
30.9K 1/10W
AGND
CM234
CM237
CM253
CM101
CD170
1uF 6.3V
1uF 6.3V
1uF 6.3V
1uF 6.3V
100NF 16V
CM251
CD144
CD61
CD119
CD62
100NF 16V
100NF 16V
100NF 16V
100NF 16V
100NF 16V
Main_12V
C4116
C4122
10uF 16V
10uF 16V
U4101
AON7934
1
8
G1
G2
2
7
D1
S2
3
6
D1
S2
R4130
4
5
D1
S2
0R05 OHM
C4104
100nF 16V
R4139
0R05 OHM
R4140
0R05 OHM
R4131
1R 1/10W 5%
C4113
3.3nF 50V
L4103
0.68uH 20% 4.5A
C4135
C4136
C4157
C4162
22UF 6.3V
NC/22UF 6.3V
NC/22UF 6.3V
NC/1uF 25V
DDRV_FB
L4102
0.47uH
C4163
C4138
Q4100
NC/1uF 25V
22UF 6.3V
R4132
AON7406
NC/0R05 OHM
Buck3_ACFB
R4126
0R05 OHM
C4121
NC/100NF 16V
+3V3
L4101
Updated on 2018/4/24
1uH
C4172
C4144
22UF 6.3V
NC/10UF 6.3V
DDRV_VPP
C4119
R4113
47K 1%
C4160
C4112
4.7UF 6.3V
100NF 16V
R4114
22K 1%
+3V3-STANDBY
R4137
10K 5%
PMIC_INT
0R05 OHM
SCL-STB
0R05 OHM
SDA-STB
CPU_GPU_P
Bottom side of Main Chip
CM84
CM72
CM64
10uF 6.3V
10uF 6.3V
10uF 6.3V
CD164
CM52
100NF 16V
100NF 16V
CD174
CD173
100NF 16V
100NF 16V
C4125
C4124
C4154
C4155
NC/10UF 10% 16V
NC/10UF 10% 16V
NC/4.7U 10% 16V
NC/4.7U 10% 16V
L4100
3.3uH
C4118
C4127
C4132
C4133
22UF 6.3V
22UF 6.3V
NC/22UF 6.3V
NC/22UF 6.3V
DDRV
R4101
DDRV_FB
DDRV=1.2V
0R05 OHM
C4108
GND_FB
100NF 16V
R4103
0R05 OHM
C4139
C4140
C4141
C4142
C4143
C4148
22UF 6.3V
22UF 6.3V
22UF 6.3V
NC/22UF 6.3V
NC/22UF 6.3V
NC/22UF 6.3V
AVDD3V3=3.3V
+3V3-AVDD
+3V3-SOC
+3V3-AVDD-SOC
R4123
0R05 1/4W
ZD4100
C4111
MM3Z3V6B-HAF
100NF 16V
DDRV_VPP=2.5V
0.8 x (1+47K/22K) = 2.5V
CPU_GPU_P
CP60
CP174
CP175
CP139
CP176
NC/1UF 6.3V
NC/22UF 6.3V
NC/22UF 6.3V
NC/22UF 6.3V
NC/22UF 6.3V
Updated on 2018/4/13
CM71
CM85
CM88
CM73
CM93
10uF 6.3V
10uF 6.3V
NC/22uF 6.3V
NC/22uF 6.3V
100NF 16V
SCL-STB
2,9
SCL-STB
SDA-STB
2,9
SDA-STB
OPWRSB_N
9
OPWRSB_N
PMIC_INT
14
PMIC_INT
A_MUTE
12
A_MUTE
+5V-STANDBY
C4156
C4107
NC/22UF 6.3V
100nF 16V
Updated on 2018/4/24
Updated on 2018/3/26
CPU & GPU=1.0V
CPU_GPU_P
C4110
100NF 16V
CM94
100NF 16V

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