The Hotswap Backplane; The System Host (System Controller) - PEP CP390 Manual

Active pmc carrier board for compactpci applications
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CP390

4.1.1.1 The Hotswap Backplane

The hotswap backplane has staggered pins to ensure defined power sequencing.
Figure 4-1: Illustration of Staggered Pinning on the Hotswap Backplane
BACKPLANE
EARLY POW ER *
BACK END POW ER *
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Note:
Some special signals (e.g. ENUM, HEALTHY, BDSEL...) have par-
ticular routing requirements.

4.1.1.2 The System Host (System Controller)

The System Controller must have the possibility to utilize the special signals defined by
the CompactPCI hotswap specification. If a high availability system is used it must addi-
tionally be able to control the hardware connection with the peripheral boards (Hardware
Connection Control).
ID 19976, Rev. 0200
Step 3
PCI SIGNALS
ENUM #
HEALTHY# *
BD_SEL#
EXPLANATORY KEY
*EARLY POW ER: a part of VCC, 3.3V, V(I/O) and GND
*BACK END POW ER: the m ain part of VCC,
+3.3V, V(I/O), +/-12V and GND
*HEALTHY: only for high availability
® PEP Modular Computers GmbH
BOARD
Step 2
Step 1
Hotswap
Page 4 - 3

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