Page 1 Version 2.2, July 2016 The material contained in this manual consists of information that is the property of Evertz Microsystems and is intended solely for the use of purchasers of the 5601MSC Master Clock/SPG. Evertz Microsystems expressly prohibits the use of this manual for any purpose other than the operation of the 5601MSC.
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Page 3 IMPORTANT SAFETY INSTRUCTIONS The lightning flash with arrowhead symbol within an equilateral triangle is intended to alert the user to the presence of uninsulated “Dangerous voltage” within the product’s enclosure that may be of sufficient magnitude to constitute a risk of electric shock to persons. The exclamation point within an equilateral triangle is intended to alert the user to the presence of important operating and maintenance (Servicing) instructions in the literature accompanying the product.
Page 4 INFORMATION TO USERS IN EUROPE NOTE This equipment with the CE marking complies with both the EMC Directive (2004/108/EC) and the Low Voltage Directive (2006/95/EC) issued by the Commission of the European Community. Compliance with these directives implies conformity to the following European standards: •...
Page 5 WARNING Changes or modifications not expressly approved by Evertz Microsystems Ltd. could void the user’s authority to operate the equipment. Use of unshielded plugs or cables may cause radiation interference. Properly shielded interface cables with the shield connected to the chassis ground of the device must be used.
Page 6 REN of all devices connected to one line must not exceed five (5.0). You should contact your telephone company to determine the maximum REN for your calling area. The 5601MSC may not be used on coin service provided by the telephone company. Connection to party lines is subject to state tariffs.
Page 7 Evertz products are for informational use only and are not warranties of future performance, either expressed or implied. The only warranty offered by Evertz in relation to this product is the Evertz standard limited warranty, stated in the sales contract or order confirmation form.
Page 8 Model 5601MSC Model 5601MSC Master SPG/Master Clock System This page left intentionally blank Page ii REVISION Revision 2.2...
Page 9: Table Of Contents
Model 5601MSC Model 5601MSC Master SPG/Master Clock System TABLE OF CONTENTS OVERVIEW ........................... 1 1.1. QUICK START GUIDE ........................3 1.1.1. Mounting and Power Connections ..................3 1.1.2. Front Panel Installation ....................... 3 1.1.3. Configuring the Ethernet Ports ................... 4 1.1.4.
Page 10 3.4. CONNECTING TWO 5601MSC UNITS IN SYNCRO MODE ............65 3.5. GPS RECEIVER INSTALLATION (GP OPTION)................ 65 3.5.1. Mounting the GPS Smart Antenna ................... 65 3.5.2. Connecting the GPS Smart Antenna to the 5601MSC ............. 67 3.5.3. System Start-up ....................... 68 HOW TO OPERATE THE MASTER CLOCK/SPG ..............69 4.1.
Page 11 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.1.1. Front Panel Buttons ......................69 4.1.2. The Status Screens ......................70 4.1.3. Panel Lock Function ......................76 4.1.4. Front Panel LCD Displays ....................76 4.2. FRONT PANEL MENU SYSTEM ....................77 4.2.1.
Page 12 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.4.1. Selecting the Test Pattern for the Analog Video Test Generator Output ....118 4.4.4.2. Selecting the Standard of the Analog Video Test Generator ........ 119 4.4.4.3. Setting the Phase of the Analog Video Test Generator ........120 4.4.4.4.
Page 13 Applying a JAR update to the VistaLINK® Pro Server .......... 159 4.6.1.2. Applying a JAR Update to the Client-Only Version of VistaLINK® Pro ....160 4.6.2. VistaLINK® Pro Control Screens for the 5601MSC ............160 4.6.2.1. Alarm View Screen ....................161 4.6.2.2.
Page 14 5.1.16. Ordering Options ......................171 5.2. UPGRADING THE FIRMWARE ....................172 5.2.1. Overview and Setup ...................... 172 5.2.2. Putting the 5601MSC into Upgrade Mode ..............172 5.2.3. Uploading the Firmware ....................173 5.2.4. Uploading the Firmware using FTP over Ethernet............173 5.3.
Page 15 Figures Figure 1-1: Front View of the 5601MSC ......................1 Figure 1-2: 5601MSC with Front Panel Removed and Other Components Partially Extracted ....... 3 Figure 1-3: Rear View of 5601MSC ........................6 Figure 1-4: Front Panel Removed, CompactFlash Location................8 Figure 2-1: 5601MSC Outputs Block Diagram ....................
Page 16 Model 5601MSC Master SPG/Master Clock System Tables Table 2-1: Global Phasing Characteristics ..................... 16 Table 2-2: Frequency Reference Types for the 5601MSC ................19 Table 2-3: Genlock Range Characteristics ..................... 21 Table 2-4: Supported Analog Video Sync References ................... 23 Table 2-5: Phase Locking to HD Tri-Level Standards ..................
Page 17: Overview
The system clock may be synchronized to GPS time (GP option), to the LTC input, to extracted VITC from the reference input, or to another 5601MSC through a syncro link. With the T option it can also synchronize once daily to a remote SNTP server. With the IRIG option the system clock may also be synchronized to incoming IRIG-B timecode.
Page 18 All of these time outputs can be individually offset from system time to a specific time zone as required. The 5601MSC can also provide RFC-1305 compliant NTP via Ethernet. There are three test signal generator options available. The SDTG option provides two composite analog video test signal outputs, two AES and one DARS output in both balanced and unbalanced formats, and balanced analog audio tone generators.
Page 19: Quick Start Guide
Model 5601MSC Master SPG/Master Clock System 1.1. QUICK START GUIDE This quick start guide discusses the major steps in getting a new installation of a 5601MSC up and running. Figure 1-2: 5601MSC with Front Panel Removed and Other Components Partially Extracted 1.1.1.
Page 20: Configuring The Ethernet Ports
5601MSC can lock its master oscillator. • GPS – The 5601MSC will look for a GPS antenna attached to the GPS port on the back of the unit. The ovenized oscillator inside the unit will lock to the 1PPS pulse from the GPS antenna.
Page 21: Selecting And Connecting Time References
See section 3.4 for more information on Syncro. • LTC – Selecting this option will cause the 5601MSC to obtain its system time from the LTC input on the GPIO connector on the back of the unit. It can also decode date information from the user bits in several different formats.
Page 22: Checking The Status Of The Unit
If the 5601MSC is to be used as part of a dual redundant system involving a 5601ACO2 automatic changeover, the wiring diagram in section 1 should be observed. Use the 15-pin male-male cables included with the 5601ACO2 to connect the GPIO ports of the 5601MSCs to the 5601ACO2.
Page 23: Configuring The Sync Outputs
HELP button for a description of each menu item function. Many test patterns are built into the 5601MSC firmware, but additional test signals can be loaded from the CompactFlash. The CompactFlash slot is located behind the front panel as shown below. To access the CompactFlash card, the front panel must first be removed by loosening the two thumb screws and pulling it off the front of the unit.
Page 24: Ftp Feature
After it has been sent, enter bye to exit ftp. At this time, the 5601MSC will store the downloaded file into its flash memory, and reboot. It will take about 3 minutes to store the application. During this time, DO NOT TURN OFF THE POWER TO THE 5601MSC.
Page 25: Final Steps Of Set Up And Securing All Connections
OUTPUT root menu. If the IRIG option is installed, they can be configured to one of several IRIG-B output modes. NTP Server - If the 5601MSC has the T option installed, it will support the Network Time Protocol. This is configured by pressing the GENERAL button and entering the NTP rules sub-menu. The 5601MSC hosts an NTP server and also sends out periodic NTP broadcasts.
Page 26 Model 5601MSC Model 5601MSC Master SPG/Master Clock System This page left intentionally blank Page - 10 OVERVIEW Revision 2.2...
Page 27: Theory Of Operation
Model 5601MSC Master SPG/Master Clock System THEORY OF OPERATION The 5601MSC is equipped with six programmable sync outputs along with a 10MHz and a Wordclock output. Two LTC/IRIG outputs are provided with primary copies on XLR connectors and secondary copies on a DB15 connector (GPIO). When equipped with a test generator option, analog/digital audio and analog/digital video outputs will be available.
Page 28: Outputs
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 2.1. OUTPUTS 2.1.1. Sync Outputs SYNC1 SYNC2 SYNC3 SYNC4 WORDCLOCK SYNC5 SYNC6 10MHz The sync output section provides six sync outputs along with a 10MHz and a Wordclock output. The 10MHz and Wordclock outputs can be configured as additional sync outputs, if required. All sync outputs are generated from the master oscillator and will be locked in frequency to the selected reference.
Page 29 Model 5601MSC Model 5601MSC Master SPG/Master Clock System HD Tri-Level Signals North American Analog tri-level sync output modes are available for a variety of HD formats. These 1080i/60 outputs are generated according to SMPTE ST 274 and SMPTE ST 296. All tri-level 1080i/59.94...
Page 30: Timecode Outputs (Ltc & Irig)
Refer to section 2.1.2, which describes the operation of the 5601MSC with regards to LTC and IRIG timecode. The LTC1 primary output on the XLR connector has an LTC power driver which can be enabled through the menu system or remotely through SNMP.
Page 31: Test Generator Options (Sdtg, Hdtg, 3Gtg)
OUTPUT root menu (see section 0). 2.1.5. Global Phase Controls The Global Phase feature of the 5601MSC provides a single point of control from which all video outputs can be phased simultaneously. There are separate controls for each of the frequency lock modes (GPS, Video, 10MHz, and Internal) to allow different phase offsets to be applied depending on the lock source.
Page 32: Table 2-1: Global Phasing Characteristics
Model 5601MSC Model 5601MSC Master SPG/Master Clock System  The “10MHz” and “Internal” global phase settings are reset to zero at startup. This is done because no phasing information is supplied in these reference modes and the phase of the outputs will be random when the unit is restarted.
Page 33: Figure 2-2: Irig-B127 Format And Alignment To Irig1 Datum Pulse
Model 5601MSC Model 5601MSC Master SPG/Master Clock System BGF2 BGF1 BGF0 Pol. Cor. Color Fr. Drop Fr. OPERATION Page - 17 Revision 2.2...
Page 34: Figure 2-4: Pal Alignment To 1Hz Pulse And Pal Color Frame Pulse
Model 5601MSC Model 5601MSC Master SPG/Master Clock System Page - 18 OPERATION Revision 2.2...
Page 35: Genlock
GENLOCK 2.2.1. Frequency Locking At the heart of the 5601MSC is the master oscillator circuit. Refer to the block diagram in Figure 2-6 below. For maximum versatility and reliability, two separate oscillators are employed. In narrow mode, an ovenized quartz oscillator (OCXO) is used for maximum stability. In wide mode, a voltage controlled oscillator (VCXO) provides a wide lock range and fast lock times.
Page 36: Selecting The Frequency Reference Type
The frequency reference for the 5601MSC is selected with the Reference Src menu item in the Frequency Ref menu off the INPUT root menu. When GPS is selected, the 5601MSC will use the GPS receiver attached to the GPS port on the rear of the unit (see section 2.2.13). When set to Ten MHz, the 5601MSC will look for a 5MHz or 10MHz continuous wave (CW) signal on the reference loop input BNCs (see section 2.2.12).
Page 37: Lock Type Selection
OCXO center value is only meaningful when locked to a very accurate frequency reference. The 5601MSC monitors the condition of both oscillators at all times. If an oscillator problem is detected, the unit will seamlessly switch to the unused oscillator and report an internal hardware fault. This will activate the Hw Fail message on the front panel and can also send out an SNMP trap.
Page 38 Careful consideration and testing of Slow lock mode effects should be made, especially when using multiple 5601MSC units locked to each other. Portable truck systems that may require a cold start of all equipment should allow for some time for oscillator warm-up and GPS lock but could require a manual frequency jam to be performed in order to get units locked up quickly.
Page 39: Video Genlock Operation
Model 5601MSC Master SPG/Master Clock System 2.2.5. Video Genlock Operation The 5601MSC can lock to various analog video sync references including NTSC, PAL, Slo-Pal signals, and HD tri-level signals. The applied video reference type is auto detected. The full list of supported standards is shown in Table 2-4.
Page 40: Serial Digital Video Timing
SMPTE timing due to the delay introduced in the measurements by the DAC process. Since the outputs of the 5601MSC are aligned using SMPTE timing, their phase must be advanced significantly in order to appear correct with Tektronix timing.
Page 41: Ntsc Genlock Operation
Inputs status screen (see section 4.1.2). If the SCH error is higher than 30º, the 5601MSC will fall back to locking to the horizontal edge of the video only. If the SCH error is in excess of 50º, or the colorburst cannot be accurately measured, the 5601MSC will report that the applied...
Page 42 The phase locking ability of the 5601MSC when supplied with an NTSC reference is summarized at the bottom of the lock diagram (Figure 2-7). The HD standards listed apply to both the HD test generators and the tri-level sync outputs.
Page 43: Ntsc Genlock With Ten-Field Reference
When an NTSC reference is applied that carries a ten-field reference pulse in the vertical blanking interval (VBI) as specified in SMPTE ST 318, the phase locking ability of the 5601MSC is enhanced. The ten-field reference provides 5 frames worth of phasing information that allows deterministic locking of 23.98Hz standards, the 6/1.001Hz pulse, and DARS/AES signals.
Page 44: Figure 2-9: Smpte St 318 Ten-Field Reference On Ntsc Line 15
Figure 2-9: SMPTE ST 318 Ten-field Reference on NTSC line 15 When the 5601MSC is locked to an NTSC reference with a ten-field pulse, the AES, DARS, and Wordclock outputs can be phase locked properly. The AES/DARS/WC lck menu item located in the AES Audio menu off the OUTPUT root menu should be set to NTSC/fractional.
Page 45: Pal Video Genlock Operation
PAL reference. If the Subcarrier to Horizontal sync error is higher than 30º the 5601MSC will fall back to horizontal sync edge locking only. If the SCH error is higher than 50º, or the colorburst cannot be measured, the unit will report that the reference is unlockable. See section 4.1.2 for details on the Inputs status screen.
Page 46 Because the AES signal coincides with the PAL signal on every frame, the phase of the AES/DARS outputs will be the same between multiple 5601MSC units that are locked to PAL. In addition, the AES block length of 192 frames is evenly divisible into a single PAL frame so the start of an AES block (identified by the Z preamble) will correctly align to line 1 of the PAL reference (as illustrated in lock diagram #3 of Figure 2-10).
Page 47: Hd Tri-Level Genlock
Figure 2-11: Lock Diagram #4 - HD Tri-Level Genlock Operation The 5601MSC can lock to several different HD analog tri-level signals. The main oscillator frequency is locked to the rising edge of the tri-level waveform. The phase information provided by tri-level reference signals is limited and each signal standard can only be used to deterministically phase lock standards of a similar frame rate.
Page 48: Slo-Pal Genlock
625i/47.95 for use with 23.98Hz film standards. With Slo-PAL references, the 5601MSC locks its frequency to the horizontal sync edges and uses the vertical sync for phasing. See Table 2-6 for phasing ability of each reference type.
Page 49: Continuous Wave And Internal References
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 2.2.12. Continuous Wave and Internal References Figure 2-12: Lock Diagram #5 - 10MHz and Internal Frequency References OPERATION Page - 33 Revision 2.2...
Page 50: Internal Frequency Reference
In order to align the output phase of two 5601MSC units that are locked to a stable CW reference, the Ten MHz Global Phase controls can be used. See section 2.1.5 for more information. When the Ten MHz Global Phase is enabled, the 5601MSC outputs can be phased manually to align them with another source.
Page 51: Gps Frequency Reference
Figure 2-13: Lock Diagram #6 - GPS Frequency Reference When the 5601MSC has been ordered with a GPS receiver (GP option), the unit can lock in frequency and phase to the high-accuracy timing provided by the GPS satellites. The main oscillator frequency is locked to the 1 pulse per second (PPS) timing pulse provided by the receiver.
Page 52: Timekeeping
2.3. TIMEKEEPING The 5601MSC contains a system clock to keep track of time and date. The stability of this clock is equal to the selected frequency reference. The accuracy of this clock is determined by the selected time reference and lock mode. The 5601MSC can access time references through the GPS receiver, modem dial-up, syncro connection to another 5601MSC, LTC input, SNTP, or VITC read from a black burst reference.
Page 53: Figure 2-14: Time Locking Block Diagram
PLL process that is used for frequency references. The system clock in the 5601MSC runs independently at the frequency provided by the master oscillator. Ideally, once the system clock has been set, it should keep perfect time forever. In practice stability errors, however slight, creep in and accumulate over time.
Page 54: Time Lock Types
Model 5601MSC Master SPG/Master Clock System 2.3.1. Time Lock Types The 5601MSC system clock runs independently from the time reference. When a difference that exceeds the threshold is detected between the system clock and the time reference, a time jam is required to set the system clock to the time reference.
Page 55: Coordinated Universal Time (Utc)
PAL VITC. See the timecode note in section 2.3.4.2.3 for more information. The 5601MSC expects that the time reference provides UTC time. This is a requirement for the NTP server or modem hosting using the NRC protocol. When either of these options are utilized, the time reference source must provide UTC time.
Page 56: Gps Time Reference
GPS. 2.3.3.2. Modem Time Reference If the 5601MSC has been equipped with a modem module, it can receive time and date by dialing into a high-level time standards service. The two protocols supported at this time are NIST Automated Computer Time Service, and NRC Computer Time &...
Page 57: Syncro Time Reference
Syncro is enabled using the Syncro menu item in the GENERAL root menu. One of the 5601MSC units is designed the master and the other is the slave. The slave unit can receive time and date from the master unit through syncro. See section 3.4 for information on syncro.
Page 58: Irig Time Reference
2.3.3.6. IRIG Time Reference When the IRIG option is installed, the 5601MSC will be able to read IRIG-B timecode that is applied to the LTC input on the GPIO connector. The IRIG type is auto-detected. Refer to section 2.3.5 for more information on the IRIG-B formats supported and how to connect IRIG to the LTC input.
Page 59: No Time Reference
2.3.3.8. No Time Reference When the time reference source is set to None, the 5601MSC will ignore all time reference sources and the system clock will freerun. The time and date must be set manually using the Set System Time and Set System Date menu items located in the GENERAL root menu.
Page 60: Dropframe Counting
Model 5601MSC Model 5601MSC Master SPG/Master Clock System Name Counting Frame Time to Time to count Number of frame Color Rate counts count one one second counts in a 24- frame per second frame worth of frames hour period Alignment 23.98 FPS...
Page 61: Figure 2-16: Dropframe Timecode With Respect To Real-Time Over 1-Hour Period
Model 5601MSC Model 5601MSC Master SPG/Master Clock System Figure 2-16: Dropframe Timecode with Respect to Real-time Over 1-Hour Period Figure 2-17: Dropframe Timecode with Respect to Real-time over a 24-Hour Period OPERATION Page - 45 Revision 2.2...
Page 62: Ltc/Vitc Timecode Color Framing
If the Color Frame control is turned on, the 25Hz and 29.97Hz LTC timecode rates will have their counts adjusted by the 5601MSC so that they maintain color frame alignment to the selected frequency reference as per SMPTE ST 12-1. If a black burst sync output has its Color Frame control turned on, the VITC timecode is adjusted to same way to maintain color frame alignment to that particular black burst sync output.
Page 63: Figure 2-19: Dropframe Timecode With Respect To Real-Time Over One Week
Model 5601MSC Model 5601MSC Master SPG/Master Clock System Every time the daily jam event occurs, the 5601MSC will attempt to bring the dropframe timecode as close to system time as possible, while optionally maintaining color frame alignment. The amount of frames adjusted depends on the error accumulated from the previous daily time jam.
Page 64: Irig Timecode
Model 5601MSC Master SPG/Master Clock System If the frequency reference of the 5601MSC is set to GPS, the time reference will also be forced to GPS. The system phase reference is derived from GPS time, but the system clock is set to UTC time, which is offset from GPS time by the total number of leap seconds that have occurred since the year 1980.
Page 65: Figure 2-21: Irig Input And Output Connections
IRIG signal. The 5601MSC can also be configured to the IRIG-B as a time reference. The time reference source must first be set to IRIG. See section 4.3.4 for information on configuring the time reference source.
Page 66: Network Time Protocol (Ntp)
If the 5601MSC is not locked to the selected time reference, the LI_Alarm flag in all outgoing NTP packets will be set. This informs clients that the NTP reference clock in the 5601MSC is not locked to a reference. This flag is also set when the time reference is set to None. When this flag is set, most clients will reject the time packet provided by the 5601MSC.
Page 67: Global Positioning System
Global Positioning System (GPS). The following section describes the basics of the GPS system and the operation of the 5601MSC when it is locking to the GPS satellites. See section 3.5 for information about installing the GPS head and connecting it to the 5601MSC. Refer to section 2.2.13 for the timing diagram when locked to GPS.
Page 68: Table 2-9: Gps Status Messages
After the 5601MSC has locked to the GPS receiver and is in a steady state condition for longer than 20 minutes the master oscillator will be phase locked to within 15ns to 90ns of the GPS system time reference, depending on the number of healthy satellites that are tracked.
Page 69: Gps Re-Lock In Slow Mode
2.5.4. GPS Position Insertion into Timecode The 5601MSC can insert the current position of the GPS antenna into the user bits of the LTC and VITC outputs. This is controlled by the VitcLtc dte fmt menu item in the GENERAL root menu (see section 4.5.4).
Page 70: Automatic Changeover Operation (5601Aco2)
2.6. AUTOMATIC CHANGEOVER OPERATION (5601ACO2) For critical infrastructure requirements a 5601ACO2 can be used to connect two 5601MSC units in a dual redundant configuration. The 5601ACO2 monitors signal health to decide which of the 5601MSC units will be connected to the downstream outputs. See the connection diagram below.
Page 71 The 5601ACO2 allows for a dual-redundant installation of two 5601MSC units. Normally one of the 5601MSC units is designated to the master, and its 28 outputs are connected to Bank A of the 5601ACO2. The second 5601MSC unit is designated as the slave (or backup), and its 28 outputs are connected to Bank B of the 5601ACO2.
Page 72 Model 5601MSC Model 5601MSC Master SPG/Master Clock System This page left intentionally blank Page - 56 OPERATION Revision 2.2...
Page 73: Installation
Figure 3-1 provides an illustration of the 5601MSC rear panel. The following sections describe the purpose of the rear panel connectors of the 5601MSC. The following sections 3.1.1 to 3.1.11 describe the specific signals that should be connected to the 5601MSC.
Page 74: Ethernet Connections
“straight through” with an 8-pin modular connector at each end. Make the network connection by plugging one end of the cable into the CONTROL receptacle of the 5601MSC and the other end into an Ethernet hub or switch. The CONTROL port hosts an NTP server (with periodic broadcasts) and an SNMP server for remote monitoring and control.
Page 75: Linear Time Code And Irig Connections
IRIG timecode. They are labelled LTC OUT 1 and LTC OUT 2. These XLR connectors are the primary copies for each timecode output. The LTC OUT 1 connector is capable of driving +12 V power for downstream Evertz clocks (see section 4.4.1.1). Pin # Name...
Page 76: Serial Port Connection
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 3.1.5. Serial Port Connection The COM connector is a 9-pin female 'D' connector for RS-232 serial communications. This port is configured for a ‘straight through’ RS-232 connection to a PC COM port and can be used for uploading firmware to the unit.
Page 77: Gpio Connections (Ltc Input, Secondary Ltc Outputs, And Syncro Connections)
LTC1 and LTC2 outputs, and an LTC input. This connector is also used to connect the 5601MSC to a 5601ACO2 auto-changeover unit to establish synchronization of settings and time between the two units (syncro). A 15-pin male-male cable is used for this purpose. The pinout of the GPIO connector is shown in Table 3-5.
Page 78: Balanced Audio And Modem Connections
The ANALOG AUDIO sub-menu in the OUTPUT root menu is used to configure the analog audio outputs. The SNSA and SNSB pins are used by the 5601MSC to detect connection to a 5601ACO2 and automatically enable highdrive. They may be left unconnected if this functionality is not desired.
Page 79: Test Generator Connections (Sdtg, Hdtg, 3Gtg Options)
Analog Test Generator 2 BNC is labeled ATG2 3.1.11. Power Connections The 5601MSC has one or two (redundant supply is optional) auto-ranging power supplies that operate on either 95-125 or 185-260 volts AC at 50Hz or 60Hz. Power should be applied by connecting a 3-wire grounding type power supply cord to the power entry modules on the rear panel.
Page 80: M4 Grounding Stud
MOUNTING AND COOLING The 5601MSC is equipped with rack mounting ears and fits into a standard 19 inch by 1 ¾ inch (483 mm x 45 mm) rack space. An optional rear support kit is available for rear mounting in a rack. The main board and power supplies are forced-air cooled by two fans in each power supply (or fan module).
Page 81: Connecting Two 5601Msc Units In Syncro Mode
(such as changing a test pattern or phase offset) will also be applied to the slave. Additionally, the master 5601MSC can be used as a time reference by the slave unit, with the time and date being transmitted through the syncro link.
Page 82: Figure 3-4: Pole Mounting The Smart Antenna
Model 5601MSC Model 5601MSC Master SPG/Master Clock System  When mounting two or more smart antennas they must be spaced at least 3 feet (1 meter) apart to prevent interference. Consider the length of the cable run when selecting the location. A 50 foot cable is supplied; however, longer cables are available on special order from the factory.
Page 83: Connecting The Gps Smart Antenna To The 5601Msc
The other end is fitted with a 9-pin male sub-miniature D connector and should be connected to the GPS connector on the rear panel of the 5601MSC. The pinout of the cable is shown in Table 3-7. If you require a longer cable, a 100 foot (Evertz part WA-T76), 200 foot cable (Evertz part WA-T10), 400 foot cable (Evertz part WA-T11), 800 foot cable (Evertz part WA-08) or 1200 foot cable (Evertz part WA- T12) may be ordered from the factory.
Page 84: System Start-Up
Lock Status and Inputs status screens on the front panel will show the various stages of initialization (see section 4.1.2). For complete information on configuring the 5601MSC to operate with the GPS Smart antenna see section 4.3.1 of this manual...
Page 85: How To Operate The Master Clock/Spg
Master Clock and Sync Pulse Generator system. The 5601MSC Master Sync and Clock Generator, is both a broadcast quality Master SPG and a Master Clock. It provides all of the synchronizing signals needed in a 21st century TV station at the same time as solving the problem of locking the in-house master clock system to the master video sync pulse generator.
Page 86: The Status Screens
The status screens are still accessible even when the front panel is locked. The status screen list can be used to quickly locate the source of a fault within the 5601MSC. Each status screen name will be shown in normal text if the subsystem it represents is functioning normally.
Page 87: Figure 4-2 : Status Screen Highlighting To Indicate Warnings And Faults
 Pressing the STATUS button and scrolling through the status screen names is a quick way to see if there are any problems with the 5601MSC. Screens that are in fault or warning conditions will be highlighted RED or YELLOW.
Page 88 Model 5601MSC Model 5601MSC Master SPG/Master Clock System Sync 1-6 The Sync 1-6 status screen shows the VITC clocks for the sync outputs in “hours:minutes:seconds:frames” format. The delimiter between the hours and minutes indicates whether Daylight Saving Time is being applied to that output. It will be a period “...
Page 89 (see section 2.2.3). The second line shows the overall lock status of the 5601MSC [#1] 10MHz frequency ref, no time ref to the selected frequency reference. This line will display “...
Page 90 35º, this line will alternate between “ ” and “ ” to (SCH>35) H-lock indicate that the 5601MSC has fallen back to locking to horizontal sync only. If the NTSC ref with GPS burst phase cannot be measured reliably, it will display “ ”. unlockable The second line displays the detection of a 10MHz or 5MHz continuous wave (CW) frequency on the reference loop input.
Page 91 Options Firmware The Options Firmware status screen displays information about the installed options in the 5601MSC as well as the current firmware version. The possible options are 3G, HD, or SD test generators, modem and NTP server or IRIG. See section 5.1.16 for a list of the available options.
Page 92: Panel Lock Function
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.1.3. Panel Lock Function Pressing the PANEL LOCK button will lock the front panel. The PANEL LOCK button will illuminate indicating that the front panel keys are disabled. This is used to prevent accidental changes to the unit once it has been configured.
Page 93: Front Panel Menu System
See section 4.3.12 for more information. Such messages include REF JAM NEEDED, which will be displayed if the 5601MSC is in Slow mode and is in the process of gradually relocking to a change in the frequency reference. If the time reference lock type has been set to USER, then TIME JAM NEEDED will be displayed when the system time and reference time mismatch.
Page 94: Figure 4-6: Adjustment Live Control
Model 5601MSC Model 5601MSC Master SPG/Master Clock System buttons or control knob will immediately be applied to the output without requiring the SELECT button to be pressed. An example is when adjusting phase of the sync outputs or when adjusting the analog audio levels.
Page 95: Menu Reference Guide
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.2.1. Menu Reference Guide Level 6 Level 1 Level 2 Level 3 Level 4 Level 5 Ten MHz Reference Src Video Internal Frequency Ref Narrow Genlock Range Wide Slow Lock type Abrupt...
Page 96 Model 5601MSC Model 5601MSC Master SPG/Master Clock System Level 1 Level 2 Level 3 Level 4 Level 5 Power Applied Power Off (LTC 1 Only) Power On 23.98 FPS 24 FPS 25 FPS Frame Rate/Irig 29.97 FPS 29.97DF FPS 30 FPS...
Page 97 Model 5601MSC Model 5601MSC Master SPG/Master Clock System Vitc Line 1 line 1 = 14 Vitc Line 2 line 2 = 16 Dropframe Ctl Color Frame Off Color Frame Color Frame On Set Jam Time 0:00 Jam Output Jam Output [LIVE]...
Page 98 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 525i 625i 1920x1080i/59 1920x1080p/23 1920x1080p/29 1920x1080p/23sF 1920x1080p/29sF 2048x1080p/23 2048x1080p/23sF 1280x720p/59 1920x1080i/50 1920x1080p/25 Image Format 1920x1080p/25sF 1280x720p/50 1920x1080i/60 Format 1920x1080p/24 (continued) 1920x1080p/30 1920x1080p/24sF 1920x1080p/30sF 2048x1080p/24 2048x1080p/24sF 1280x720p/60 1920x1080p/59 1920x1080p/50 1920x1080p/50 422/10 YCbCr 444(4)/10 YCbCr...
Page 99 Model 5601MSC Model 5601MSC Master SPG/Master Clock System Jam Output Jam Output [LIVE] TIME JAMMED Jam all VITC/LTC Jam all VITC/LTC [LIVE] ALL TIMES JAMMED Time offset 0 frames Time zone 0:00 hours SDI TG 1 (1, 2, 3, 4)
Page 100 Model 5601MSC Model 5601MSC Master SPG/Master Clock System Time zone 0:00 hours ATG 1 (1, 2) DST Ctl (continued) Include syncro Syncro Exclude syncro Left frequency 20Hz – 12.0kHz Right frequency 20Hz – 12.0kHz Audio Level Left level [LIVE] Left 10.0 dBu...
Page 101: Table 4-3: Output Menu System Tree
Model 5601MSC Model 5601MSC Master SPG/Master Clock System Global Ph Off GPS phase En Global Ph On GPS mS [LIVE] Global phasing GPS uS [LIVE] GPS nS [LIVE] Global Ph Off Video ph En Global Ph On Video mS [LIVE]...
Page 102 Model 5601MSC Model 5601MSC Master SPG/Master Clock System Level 1 Level 2 Level 4 Level 5 Level 3 Set System Time Set System Time 16:38:55 Set System Date Set System Date 2010 Dec. 25 VitcLtc Userbit 00000000 Legacy Production SMPTE - 309 MJD...
Page 103 Model 5601MSC Model 5601MSC Master SPG/Master Clock System (continued) Set Password 5601 SNMP off SNMP Ctl SNMP status SNMP on Com string Rd public Com string Wr private Trap IP disabld Trap 1 Ctl Trap IP enabled Trap1 IP Add 0.0.0.0...
Page 104 Model 5601MSC Model 5601MSC Master SPG/Master Clock System (continued) (continued) (continued) Menu Locked Genlock Range Freq Lock Type Time Ref Source Vitc Read Line VITC/LTC Date Irig In Mode Time IP Time Lock Type Input Jam Time Jam Freq Ref...
Page 105: Table 4-4: General Menu System Tree
Model 5601MSC Model 5601MSC Master SPG/Master Clock System First week Second week DST end week Third week Fourth week Last week DST end month January to December 0 hours DST hrs offset 1 hour 2 hours Get preset 1 Get Preset 1 [Live]...
Page 106: Configuring The Input References
4.3. CONFIGURING THE INPUT REFERENCES The INPUT menu is used to set up various items related to the input references of the 5601MSC. The chart below shows the items available in the INPUT SETUP menu. Sections 4.3.1 to 4.3.12 give detailed information about each of the sub-menus.
Page 107: Configuring The Genlock Capture Range
4.3.3. Selecting the Frequency Reference Lock Type The Lock Type menu item is used to select how the 5601MSC will relock to INPUT its frequency reference when the reference is lost and then regained, or Frequency Ref experiences a change.
Page 108: Selecting The Time Reference
Syncro forced to GPS. See section 2.3.3.1 for more information. VITC When set to Modem the 5601MSC system time is obtained by dialling into a None high-level time service such as the NRC or NIST ACTS (M option required). IRIG...
Page 109: Setting The Vitc Reader Line
14 4.3.6. Configuring the VITC and LTC Time Reference Date Format The Date Mode menu item is used to select how the 5601MSC will decode INPUT date information from the user bits of the VITC and LTC inputs. It is only Time valid when the time reference source is set to VITC or LTC.
Page 110: Selecting The Sntp Ip Enable
Up to 8 servers can be set up. During the daily time sync to SNTP, the NTP IP 2 5601MSC will contact each server that is enabled and chose the one with NTP IP 3 the best time, based on the data provided by the servers.
Page 111: Selecting The Time Reference Lock Type
Model 5601MSC Master SPG/Master Clock System 4.3.10. Selecting the Time Reference Lock Type The Lock Type menu item is used to control how and when the 5601MSC INPUT updates its system time to match the time reference. This decision is made Time whenever the system time is in disagreement with the time reference.
Page 112: Synchronizing The System Oscillator Or System Time To The Reference Immediately
Performing a manual jam of the time reference will only be required when the time lock type is set to User or Never. In User mode the 5601MSC will warn whenever system time does not agree with the time reference (see section 4.3.12).
Page 113: Configuring The Outputs
4.4. CONFIGURING THE OUTPUTS The OUTPUT menu is used to configure the various outputs of the 5601MSC. The chart below shows the items available in the OUTPUT menu. Sections 4.4.1 and 4.4.2 give detailed information about each of the sub-menus.
Page 114: Configuring The Ltc Outputs
Model 5601MSC Master SPG/Master Clock System 4.4.1. Configuring the LTC Outputs There are two LTC outputs available on the 5601MSC. Each LTC output has primary outputs on XLR connectors, and secondary outputs on the GPIO DB15 connector. Each of the outputs can be individually configured using a similar set of menus.
Page 115: Setting The Ltc Output Frame Rate And Irig
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.1.2. Setting the LTC Output Frame Rate and IRIG This menu item sets the frame rate and counting mode of the LTC output. In OUTPUT order to maintain a correlation to real time when using timecode rates that...
Page 116: Selecting When The Ltc Time Is Synchronized To The System Time
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.1.3. Selecting when the LTC Time is Synchronized to the System Time This menu item allows the user to set the time of day when the LTC output OUTPUT time will be synchronized to the system time. This synchronization is...
Page 117: Selecting The Ltc Time Zone Offset
Model 5601MSC Model 5601MSC Master SPG/Master Clock System and the LTC output time. This feature is commonly used to compensate LTC 1 for video path delays common within a television facility. The offset Time offset value will be added along with the time zone offset (see section 4.4.1.7) -125 frames and the Daylight Saving Time correction (see section 4.4.1.8) to obtain...
Page 118: Enabling Ltc Polarity Correction
This menu item allows the user to control whether the color frame flag is OUTPUT set on the LTC output. When the color frame flag is on, the 5601MSC will LTC 1 ensure that the timecode is aligned according to SMPTE ST 12-1 to the Color Frame applicable video standard.
Page 119: Selecting The Standard Of The Sync Outputs
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.2.1. Selecting the Standard of the Sync Outputs This menu item sets the format of the sync output. All sync outputs including OUTPUT the 10MHz and Wordclock outputs are fully configurable. Sync 1...
Page 120 Model 5601MSC Model 5601MSC Master SPG/Master Clock System into the vertical blanking interval of the sync output. Sync 1 Vitc Ctl This menu item is only applicable when the Sync Mode is set to the PAL-B or NTSC-M formats and will disabled for other formats (shown in dark text).
Page 121 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.2.2.5. Selecting When the VITC Time is Synchronized to the System Time This menu item allows the user to set the time of day when the VITC on the OUTPUT sync output will be synchronized to the system time. This synchronization is...
Page 122 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.2.2.7. Synchronizing all the VITC, LTC, and Burn-In Clocks to System Time Immediately This menu item allows the user to synchronize both LTC outputs and all the OUTPUT VITC output times to system time immediately.
Page 123 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.2.2.10. Enabling Daylight Saving Time for the VITC on the Sync Output OUTPUT This menu item allows the user to control whether Daylight Saving Time (DST) compensation will be applied to the VITC time on the sync output.
Page 124 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.2.2.13. Selecting the Sine Wave Level This menu item is used to select the output amplitude of the sine wave sync OUTPUT formats. This affects the subcarrier modes and the 5MHz/10MHz modes.
Page 125: Setting The Phase Of The Sync Outputs
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.2.3. Setting the Phase of the Sync Outputs The phase of the sync outputs is set independently of each other. There are four menu items that are used to set the phase. Figure 4-7 and Figure 4-8 show the default video sync alignment (V phase = 1, H phase = 1, fine phase = 0.0%) for 59.94Hz and 50Hz systems respectively.
Page 126 Model 5601MSC Model 5601MSC Master SPG/Master Clock System OUTPUT There are four menu items that are used to adjust the phase of the sync output. Only the black burst (NTSC-M and PAL-B) and HD tri-level output Sync 1 modes can be phased. The pulse and subcarrier sync formats will always Fine phase remain in phase with the frequency reference.
Page 127: Configuring The Sdi Video Test Generator Outputs (Sdtg, Hdtg, 3Gtg Options)
75% COLOR BARS See section 4.4.5 for a complete list of test signals included with the RP219 COLORBARS 5601MSC firmware and those that can be added by loading a VALID RAMP CompactFlash card and inserting it into the unit. 100%WHITE WINDOW...
Page 128: Selecting The Image Format Of The Sdi Video Test Generator
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.3.3. Selecting the Image Format of the SDI Video Test Generator OUTPUT The Image Format menu item is located within the Format sub-menu and controls the video standard that is output from the SDI test SDI TG 1 generator.
Page 129: Setting The Phase Of The Sdi Video Test Generator
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.3.5. Setting the Phase of the SDI Video Test Generator The four SDI test signal outputs are all phased independently from each other and can be adjusted independent of the sync and analog video test generator outputs. Refer to Figure 4-7 and Figure 4-8 for the default video sync alignment for 59.94Hz and 50Hz systems respectively.
Page 130 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.3.6.2. Selecting the Audio Tone for an SDI Embedded Audio Channel There are 4 identical menu items to select the tone frequency for each of the audio channels in the group. For the sake of simplicity only the menu item for channel 1 is described in the manual.
Page 131: Configuring The On-Screen Message For The Sdi Test Generator Outputs
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.3.7. Configuring the On-Screen Message for the SDI Test Generator Outputs It is possible to overlay a user-defined text message onto the outputs of the SDI test generators. There are six menu items used to control the message displayed and are described below.
Page 132 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.3.7.4. Selecting the Font Size of the On-Screen Message for the SDI TG This menu item controls the size of the font that is used for the on- OUTPUT screen message text.
Page 133 Model 5601MSC Model 5601MSC Master SPG/Master Clock System once per day at the time specified using the Set Jam Time menu item (see Jam Output section 4.4.2.2.5). TIME JAMMED Caution: This menu item is a live control. To synchronize the SDI burn in timecode to system time immediately, select the Jam Output menu item and press the SELECT button.
Page 134: Configuring The Sdi Test Generator Output Drive
No 5601ACO2 resistive attenuator. 5601ACO2 in use Select Auto detect ACO to have the 5601MSC automatically turn highdrive on when the SNSA and SNSB pins of the AUDIO connector are pulled low through connection to a 5601ACO2 (see section 3.1.8).
Page 135: Selecting The Standard Of The Analog Video Test Generator
Y RAMP See section 4.4.5 for a complete list of test signals included with the SHALLOW Y RAMP 5601MSC firmware and those that can be added by loading a MODULATED RAMP CompactFlash card and inserting it into the unit. CCIR 17...
Page 136: Setting The Phase Of The Analog Video Test Generator
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.4.3. Setting the Phase of the Analog Video Test Generator The Analog test signal output can be adjusted independent of the Sync and SDI test generator outputs. There are four menu items that are used to set the phase of the Analog Test Generator output. Refer to Figure 4-7 and Figure 4-8 to see the default alignment for 59.94Hz and 50Hz systems respectively.
Page 137: Configuring The On-Screen Message Of The Analog Video Test Generator
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.4.4. Configuring the On-Screen Message of the Analog Video Test Generator It is possible to overlay a user-defined text message onto the output of the analog video test generators. There are six menu items used to control the message displayed and are described below.
Page 138 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.4.4.5. Enabling On-Screen Burn in for the Analog Video Test Generator This menu item controls whether the on-screen timecode burn in window OUTPUT will be placed at the bottom of the analog test generator output image. This ATG 1 burn in window is useful for tagging each frame with a unique timecode ID.
Page 139 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.4.4.9. Synchronizing the Analog Test Generator Burn In Clock to System Time Immediately This menu item allows the user to synchronize the burn in clock for the OUTPUT analog test generator to system time immediately. This synchronization will...
Page 140: Setting The Analog Test Generator Syncro Mode
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.4.4.12. Selecting the Analog Video Test Generator Burn In Timecode Time Zone Offset This menu item allows the user to set a time zone offset between the OUTPUT system time and the analog video test generator burn in time. The time zone ATG 1 offset value is set in 30-minute increments.
Page 141: Test Signals Available
Model 5601MSC Master SPG/Master Clock System 4.4.5. Test Signals Available The 5601MSC firmware contains a comprehensive set of test patterns for each video standard. Additional test patterns can be loaded using a CompactFlash card (see section 1.1.9). The full list of test patterns is shown here for firmware v2.0 b30.
Page 142: Signal List For Hd, 1280X720
OUTPUT root menu. These outputs are provided on the AUDIO terminal block on the rear of the 5601MSC (see section 3.1.8). These outputs can be driven in two different modes chosen by the Audio Mode menu item. They can generate steady tones, or can be driven in event mode to generate timed tones of different types and durations.
Page 143: Setting The Analog Audio Tone Frequency
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.6.1. Setting the Analog Audio Tone Frequency The Left frequency and Right frequency menu items are used to select the OUTPUT frequency of the tone that will be output onto the analog audio channels.
Page 144: Configuring The Analog Audio Events
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.6.4. Configuring the Analog Audio Events There are ten different audio events, each one with similar menu settings. Note that audio events with a lower number have a higher priority than audio events with a higher number. For the sake of simplicity, only the menu items for Audio Event 1 will be described in the manual.
Page 145: Configuring The Aes And Dars Digital Audio Outputs
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.6.4.4. Setting the Analog Audio Event Duration The Duration menu items sets the duration of the analog audio event. If OUTPUT the left or right channel is set to the constant tone type, this duration is...
Page 146: Setting The Phase Of The Aes And Dars Outputs
The WC phase menu item is used to set the phase of the wordclock signal OUTPUT that is output by the 5601MSC. This is a global phase control that affects AES Audio any output which is configured to wordclock mode. Rotate the control knob WC phase or press the ...
Page 147: Selecting The Tones To Generate On The Aes Digital Audio Outputs
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.4.7.4. Selecting the Tones to Generate on the AES Digital Audio Outputs There are four menu items that are used to select the frequencies of the OUTPUT tones that are generated on the AES outputs. Each AES output is controlled...
Page 148: Configuring Global Phase
(us), and milliseconds (ms). The total global phase range is 160 milliseconds. The global phase control can be used to correct for differences in reference phase between a 5601MSC and another device (such as that caused by mismatched cable length). The global phase offset affects the LTC, sync, AES, DARS, wordclock, SDI TGs, and analog TG outputs.
Page 149: General Configuration Items
The GENERAL setup menu is used to set up various items related to the overall operation of the 5601MSC. Table 1-1 shows the items available in the GENERAL setup menu. Sections 4.5.1 to 4.5.14 give detailed information about each of the sub-menus.
Page 150: Setting The Vitc/Ltc Userbits
Select Lat/Long to embed location information in the user bits. This is only valid when the frequency reference is GPS. Note that this embeds the location of the antenna, and not the 5601MSC. This is useful for mobile applications and remote site filming. See section 2.5.4 for more information.
Page 151: Enabling Syncro Mode
5601MSC units to synchronize their settings and/or time with each other. Syncro When the GPIO ports of two 5601MSC units are connected to a 5601ACO2, Syncro Off the syncro link is established. One unit must be designated master, and the Slave menu other unit slave.
Page 152: Initiating A Firmware Upgrade
The Engineering Menu is used to configure the Simple Network Management Protocol feature of the 5601MSC, as well as access to menus through the front panel. This menu is password protected to prevent unauthorized tampering of the unit. From this menu remote SNMP access can be disabled, set to read-only, or set to full control.
Page 153: Changing The Engineering Menu Password
The SNMP sub-menu of the EngineeringMenu setup menu is used to configure SNMP operation of the 5601MSC. The SNMP protocol runs on the CONTROL Ethernet port and is used for remote monitoring and control of the unit. The 5601MSC can also send SNMP traps to as many as four remote IP ®...
Page 154 Pro to use different strings. public These strings are used as a password for SNMP read and write requests. When the 5601MSC receives an SNMP read request, the Com string Wr community string in the request must match the string set by the Com string Rd menu item.
Page 155 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.5.9.3.3. Configuring the SNMP Trap Destinations There are four trap destinations that the 5601MSC can send SNMP GENERAL traps to. Each trap destination has a control menu item, and an IP EngineeringMenu address menu item.
Page 156 Model 5601MSC Master SPG/Master Clock System 4.5.9.3.4. Enabling and Disabling SNMP Traps GENERAL There are a total of 13 events that the 5601MSC can be configured to send out SNMP traps for. All traps except for the Frequency Reference EngineeringMenu failure are disabled by default.
Page 157: Configuring Access To Front Panel Menus
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.5.9.4. Configuring Access to Front Panel Menus The Menu Access Ctl sub-menu of the EngineeringMenu setup menu is used to control access to menus in the front panel menu system. It has no effect on SNMP control (if enabled) of these menus.
Page 158 Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.5.9.4.2. Setting the Front Panel Menu Restrictions GENERAL There are separate controls for enabling or disabling menu access for the front panel menu system. Entire menus can be disabled or just EngineeringMenu certain menu items within.
Page 159: Setting The Number Of Power Supplies Installed
Model 5601MSC Master SPG/Master Clock System 4.5.9.5. Setting the Number of Power Supplies Installed This menu item is used to tell the 5601MSC how many power supplies are GENERAL installed in the chassis. This menu item must be set correctly when first...
Page 160 For further information about daylight saving time in your area consult the web page http://www.timeanddate.com/time/aboutdst.html. Because of the variation of daylight saving time rules throughout the world, the 5601MSC has several menu items to allow the user to set the DST rules for their region. These rules affect all outputs for which DST is enabled.
Page 161: Setting The Dst Date Entry Mode
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.5.10.1. Setting the DST Date Entry Mode This menu item allows the user to set the method of entering the DST GENERAL information in the DST registers. DST rules DST mode Select day/week/month to enter the DST information in the following...
Page 162: Setting The Dst Start Month
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.5.10.5. Setting the DST Start Month This menu item allows the user to set the month when DST begins. Use GENERAL the control knob to change the start month for DST. DST rules...
Page 163: Setting The Dst Offset
2 hours 4.5.11. Saving and Recalling Presets The 5601MSC allows saving the entire system setup, including all menu settings to a preset. There are three user presets available, and two factory presets. The Presets menu in the GENERAL root menu contains controls for saving and recalling user presets, and recalling factory presets.
Page 164: Saving A User Defined Preset
There are three user-defined presets that can be saved in the 5601MSC. GENERAL To save the current configuration of the 5601MSC to a preset, use the Presets Save preset 1, Save preset 2, Save preset 3 menu items. Once a preset is...
Page 165: Setting Up The Internet Protocol Subnet Mask For The Time Ethernet Port
Ethernet ports. IP Control Broadcast Mode When set to ctrl en, time e, the 5601MSC will respond to all broadcast ctrl en, time e ctrl rej,time e packets on both Ethernet ports. This is the default mode of operation but...
Page 166: Configuring The Network Time Protocol Functions (Units Fitted With The T Option)
“Internet Time”. If the “Internet Time” tab does not exist, use the command-line method below. Enter the IP address of the 5601MSC into the Server text box and click on the “Update Now” button. If the PC communicates with the 5601MSC NTP server, the time should update successfully.
Page 167: Configuring The Ntp Restrictions
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.5.13.2. Configuring the NTP Restrictions Restrictions define which IP addresses will be ignored by the NTP server. There are 8 restriction entries allowed, and they are additive. By default, all IP addresses are permitted to query the NTP server. Each restriction can block an IP address or range of IP addresses.
Page 168: Configuring The Precision Time Protocol Master
4.5.14. Configuring the Precision Time Protocol Master The PTP Master sub-menu is used to configure the PTP master protocol on the Time Ethernet port of the 5601MSC. Note that the master mode does not operate if time or frequency reference is PTP. ...
Page 169: Setting The Ptp Dscp Value
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.5.14.3. Setting the PTP DSCP value GENERAL This menu item is used to set the PTP Differentiated Services Code Point (DSCP) value. Note that only 16, 18, 20, 24, 32, 24, 28, 40, 48, 52, 54, and PTP Master 56 should be used.
Page 170: Ptp Priority 2
PTP Master output. They are output as a TLV extension in the IEEE-1588 announce GMP Enable packet. They may be enabled for use with Evertz “Grand Master Proxy” GMP off products to enhance the time accuracy. GMP on sync 1 GMP on sync 2 Select GMP off to disable outputting GMP TLVs.
Page 171: Accuracy
MASTERS. Announce rate and timeout should be based on the changeover requirements. The timeout multiplied by the announce rate gives the time the 5601MSC will go before becoming a MASTER when MASTER CLOCK Page - 155 Revision 2.2...
Page 172 GMP enable is used to add a TLV to the announce message. It should only be enabled if there is an Evertz GMP product in use. The Evertz product will get NTSC or PAL sync from this 5601MSC. It should be set to the channel of sync that is providing this sync source. Note that the GMP must be connected to this 5601MSC via an ordinary switch, or a transparent switch.
Page 173: Snmp Remote Control With Vistalink
IP network. The 5601MSC implements SNMP version 1 as outlined in RFC 1157 and RFC 1213. The protocol works by exchanging SNMP messages between an SNMP client (normally a computer running an SNMP client program) and a device such as the 5601MSC (sometimes called a network element).
Page 174: Figure 4-9: Selecting The Version Information Menu Item
In the Version Information dialog window, all of the JAR files that are contained within the VistaLINK Pro client are listed on the left. Scroll down the list to the 5601MSC. Once selected, the product version is displayed. In the example above, the 5601MSC JAR file version 23 is being used. If the 5601MSC ®...
Page 175: Applying A Jar Update To The Vistalink® Pro Server
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 4.6.1.1. Applying a JAR update to the VistaLINK® Pro Server ® The VistaLINK Pro software runs a separate application for the server to which multiple clients can connect. The client software may be run on the same computer, or on a different computer connected to the network.
Page 176: Applying A Jar Update To The Client-Only Version Of Vistalink® Pro
“Tree” menu and selecting “Hide/Show Tree”. If the hardware node is not visible, check that it is enabled in the “Tree” menu under “Properties…”. The 5601MSC should show up as a 1RU network graphic, listed by its IP address: .
Page 177: Alarm View Screen
Right-Click Pop-Up Menu 4.6.2.1. Alarm View Screen The Alarm view can be accessed by right-clicking on the 5601MSC in the Navigation Tree and selecting ® “View Alarm”. This will open up an alarm window that pulls the alarm log from the VistaLINK server.
Page 178: Figure 4-15: Vistalink® Pro Alarm View
Model 5601MSC Model 5601MSC Master SPG/Master Clock System Figure 4-15: VistaLINK® Pro Alarm View Alarms are listed in the order which they were received. The “Cor” column shows which faults have since corrected or cleared themselves. When an alarm is received, the border of the client will flash red, as will the device icon under the navigation tree.
Page 179: Control View Screens
Model 5601MSC Master SPG/Master Clock System 4.6.2.2. Control View Screens The configuration view is used to graphically configure and monitor the settings on the 5601MSC. It can be accessed by right-clicking on the device in the navigation tree and selecting “View Configuration…”.
Page 180: Table 4-8: Vistalink
Changing a setting is accomplished by clicking on the desired item and selecting a different setting. Press the green Apply button at the top to send the changes to the 5601MSC. For making live changes, Dynamic Apply can be turned on by clicking on the red Apply button. When Dynamic Apply is turned on, any change made will be immediately sent to the 5601MSC.
Page 181: Technical Description
Model 5601MSC Model 5601MSC Master SPG/Master Clock System TECHNICAL DESCRIPTION 5.1. SPECIFICATIONS 5.1.1. Analog Sync Outputs Output Standards: Black Burst: SMPTE ST 170 (NTSC-M), ITU-R BT.1700-1 (PAL-B) Bi-Level: 480p (SMPTE 293M), 576p (ITU-R BT.1358), Slo-Pal 625i/48, 625i/47.95 HD Tri-Level: SMPTE ST 274 (1080i/59.94, 1080i/60, 1080i/50, 1080p/59.94, 1080p/60, 1080p/50, 1080p/25, 1080p/30, 1080p/29.97, 1080p/24, 1080p/24sF,...
Page 182: Modem: (M Option Installed)
Model 5601MSC Model 5601MSC Master SPG/Master Clock System Level: RS232 Baud Rate: 115200 baud Format: 8 data bits, no parity, 2 stop bits 5.1.3.2. Modem: (M option installed) Connector: RJ-11 telephone jack Baud Rate (NRC): 300 baud (Bell 103 compatible) Baud Rate (NIST): 1200 baud (V.22) or 4800-14400 baud (V.32bis)
Page 183: Dars & Aes Test Generator Outputs (Sdtg, Hdtg, Or 3Gtg Options)
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 5.1.5. DARS & AES Test Generator Outputs (SDTG, HDTG, or 3GTG options) Standard: Unbalanced: SMPTE 276M Single ended AES (24 bits) Balanced: AES3-1992 (24 bits) Number of Outputs: DARS: 1 unbalanced, 1 balanced...
Page 184: Analog Composite Video Test Signal Generators (Sdtg, Hdtg, Or 3Gtg Options)
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 5.1.7. Analog Composite Video Test Signal Generators (SDTG, HDTG, or 3GTG options) Standard: SMPTE ST 170 (NTSC-M), ITU-R BT.1700-1 (PAL-B) Number of Outputs: 2 individual test generators with 1 output each Connector:...
Page 185: Hdtv Test Generator Outputs (Hdtg Option Installed)
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 5.1.10. HDTV Test Generator Outputs (HDTG option installed) SDI Standards: SMPTE ST 259-C (270Mb/s) 4:2:2 10 Bit YCbCr SMPTE ST 292-1 (1.485 Gb/s) 4:2:2 10 Bit YCbCr Image Standards: SMPTE ST 125 (525 line and 625 line 13.5 MHz sampling) SMPTE ST 274 (1080i/59.94, 1080i/60, 1080i/50, 1080p/30, 1080p/25,...
Page 186: 3Gtv Test Generator Outputs (3Gtg Option Installed)
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 5.1.11. 3GTV Test Generator Outputs (3GTG option installed) SDI Standards: SMPTE ST 259-C (270Mb/s) 4:2:2 10 Bit YCbCr SMPTE ST 292-1 (1.485 Gb/s) 4:2:2 10 Bit YCbCr SMPTE ST 372 (Dual Link 1.485 Gb/s) 4:2:2 10 Bit YCbCr and 4:4:4 GBRA or YCbCr SMPTE ST 292-2 (Stereoscopic 3D Dual Link 1.485 Gb/s) 4:2:2 10 Bit...
Page 187: Power Supplies
Model 5601MSC Model 5601MSC Master SPG/Master Clock System 5.1.13. Power Supplies Voltage: Auto-ranging 100 - 240 Volts AC, 50/60Hz Power Factor: > 0.7 Configuration: Optional redundant supply available with PS option Power Consumption Warm-Up: 75 watts max (with all options installed and max LTC1/GPS power draw)
Page 188: Upgrading The Firmware
UPGRADING THE FIRMWARE 5.2.1. Overview and Setup The firmware in the 5601MSC is contained on a FLASH EEPROM. From time to time firmware updates will be provided to add additional features to the unit. Check the Evertz web site for information on firmware releases (www.evertz.com).
Page 189: Uploading The Firmware
After it has been sent, enter bye to exit ftp. At this time, the 5601MSC will store the downloaded file into its flash memory, and reboot. It will take about 3 minutes to store the application. During this time, DO NOT TURN OFF THE POWER TO THE 5601MSC.
Page 190: Servicing Instructions And Troubleshooting
5.3.2. Replacing the Battery The 5601MSC is fitted with a 3V 20mm diameter Lithium battery type CR2032. This battery is used to power the clock while power is removed from the unit. If the unit is not keeping time properly when it is powered down, the battery should be replaced according to the procedure outlined in section 5.3.2.1.
Page 191: Safety Guidelines And Precautions Concerning The Use Of 3V Lithium Batteries
Model 5601MSC Model 5601MSC Master SPG/Master Clock System CAUTION Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type. 5.3.2.1. Safety Guidelines and Precautions Concerning the Use of 3V Lithium Batteries Please observe the following warnings strictly. If misused, the batteries may explode or leak, causing injury or damage to the equipment.
Page 192: Troubleshooting Issues
Check the wiring of the GPS antenna cable (see section 3.5.2). The GPS head may not be getting +12V power from the 5601MSC, or the RS422 Tx and Rx pins are miswired. Verify that none of the wires are pinched or broken inside the DB9 backshell.
Page 193: Front Panel Issues
1 digit to 9 digits long. 2. If the password has been set accidentally to an unknown value, try entering 0. If that does not work, contact Evertz customer support for a password recovery procedure. TECHNICAL DESCRIPTION Page - 177...
Page 194: Vistalink® Pro Issues - Snmp Problems
5.3.3.3.5. When a Menu Item is Changed it Reverts Back After Several Seconds If the 5601MSC has been configured with Syncro enabled in slave mode, the unit will attempt to pull settings from a master 5601MSC connected through a 5601ACO2 automatic changeover unit. This will prevent the user from making any changes in the OUTPUT root menu.
Page 195 Model 5601MSC Master SPG/Master Clock System 6. If the 5601MSC is not discovered, attempt to add it manually to the tree. Right-click on the Hardware item in the Navigation Tree or go the Tree menu. Select Add/Update Agent. Enter the IP address of the 5601MSC and click OK.
Page 196: Unit Is Not Locking To The Frequency Reference
See section 2.2.4 for more information on Slow mode. 2. If the 5601MSC has reported 100% lock to the reference but is not in phase with the reference, check that the Global Phase has not been enabled. The Global Phase settings shift the phase of most outputs by a specified amount of time.

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