Diagrams - Sony CDX-616 Service Manual

SECTION 7

DIAGRAMS

7-1. BLOCK DIAGRAM – SERVO/DA CONVERTER Section –
PD1 I-V AMP
PD1
38
RF
DETECTOR
+
SUMMING
PD2 I-V AMP
AMP
A D
PD2
39
B C
F
E
RF AMP,
FOCUS/TRACKING
SERVO
IC11 (1/2)
OPTICAL PICK-UP
(KSS-521A)
F
41
I-V
E
AMP
42
LASER DIODE
AUTOMATIC
LD
LD
POWER CONTROL 36
AMP
Q11
LD
PD
FOCUS/TRACKING COIL DRIVE,
SPINDLE/SLED MOTOR DRIVE
IC51
2-AXIS
DEVICE
OUT+
2
TRACKING
OUT–
COIL DRIVE
1
OUT+
12
FOCUS
OUT–
COIL DRIVE
13
05
OUT+
26
SLED
M102
M
OUT–
(SLED) MOTOR DRIVE
27
OUT+
17
M101 SPINDLE
M
OUT–
(SPINDLE) MOTOR DRIVE
16
OUT1
1
M103 CHUCKING
M
OUT2
MOTOR DRIVE
(CHUCKING)
7
CHUCKING MOTOR DRIVE
IC52
RFO
33
RFI
32
FOCUS OK FOK
27
COMPARATOR
FOCUS OK
AMP
DATA
MIRR
22
TTL
AMP CLK
TTL
20
XLT
21
IIL LOCK
DEFECT 19
IIL
AMP XRST
23
SENS1
25
IIL
C.OUT
24
SENS2
TTL
26
FOCUS
FEI FEO
FEO FOCUS PHASE
ERROR 1 2 6
COMPENSATION
AMP
RV14
FE BIAS
FOCUS
40
GAIN
TRACKING
TEI TAO
TEO TRACKING PHASE
ERROR 45 47 13
COMPENSATION
AMP
PD
AMP
PD
37
IN
4
IN
10
SLED SERVO
IC11 (2/2)
IN SLO SLED SLP
24 16 14
AMP
IN
19
SW12
(SAVE END DETECT)
FIN
ON : When completion of the disc
4
chucking operation.
RIN
5 SW11
(CHUCKING END DETECT)
ON : When completion of the disc
chucking operation.
(LIMIT)
ON : When the optical pick-up
is inner position.
– 19 –
DIGITAL SIGNAL PROCESSOR, FILTER
CLV SERVO
IC101
39 42 38 40
RF EFM
ASYMMETRY
44 DIGITAL PLL
DEMODULATOR
CORRECTION
ASYI
46
ASYO
47
FOK
23
SUB-CODE
PROCESSOR
DATO
15
CLKO
17
XLTO
16
SEIN
13
CNIN
DIGITAL CLV CPU INTERFACE
14
26 27 28 29 64 8 7 9 10 12 11 75 76 77
SYSTEM CONTROLLER
IC201 (1/2)
54 C.OUT
SUBQ 52
22 FOK SCLK 51
8 SENS2 SENS 23
CD.DATA 67
CD.CLK 65
CD.XLT 66
SCOR 63
GFS 24
21
XRST
DIGITAL FILTER, D/A CONVERTER,
PCMD
DATA
22
BCK BCK
23
LRCK LRCK
24
MCK
13
4 CH.F
5 CH.R
7 LOAD1
6 LOAD2 ML 45
EMP 44
SW1 A.MUTE 43
9 LIM.SW
D.OUT
DIGITAL
71
OUT
PCMD PCMD
52
BCKO BCK
54
LRCK LRCK
50
RFCK
62
C2PO
63
WDCK
49
16K
RAM
ERROR
CORRECTOR
GTOP
58
WFCK
74
EMPH
72
CLOCK
70
GENERATOR
C4M
61 100 89
LOW-PASS FILTER
IC601
LO
∆Σ 9
DIGITAL
SERIAL
LOW-PASS
MODULATOR
INPUT FILTER
FILTER
RO
MUTING
CIRCUIT CIRCUIT
INTERFACE
5
Q610
MUTING
Q620
TIMING CPU
INTERFACE
GENERATOR
OSC
16 15 21 19
X601
16.9344MHz
MUTING
CONTROL SWITCH
Q601, 602
– 20 –
CDX-616
• SIGNAL PATH
: CD PLAY
WFCK
A (Page 21)
SCLK
B (Page 21)
SBSO
C (Page 21)
SCOR
D (Page 21)
CN901 (1/2)
AUDIO OUT
L
R