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7.6.
F/Z/I/MDA SCHEMATIC DIAGRAM
G
TO CPU
TO DSP
TO CPU
F
E
D
TO REG
C
B
TO CPU
A
1
0 1 MAIN (F/Z/I/MDA)
IRIS_O/C
IRIS_PWM
HALL_A/D
H_GAIN
H_OFFSET
IR_DC
IR_FLICK
L4201
NQR0006-001X
REG_4.8V
C4201
C4202
2.2/50
0.1
GND
L4502
22
Z_REG_4.8V
ZF_REG_4.8V
R4509
UNREG
R4510
Q4503
R4511
Q4502
L4501
NQR0006-001X
REG_3.2V
TO DSP
VDVHS
LENS_LED
LENS_CS
SO3
SCK3
LENS_CLK
DSP_REST
NOTE : The parts with marked ( ) is not used.
2
R4258
C4253
0.015
820K
100K
R4256
R4257
8.2K
C4256
C4254
0.015
10
/16
R4259
68K
Q4251
RPM-22PB
(
)
WHITE
BALANCE
SENSOR
R4251
1.8K
R4252
10K
R4516
R4512
0R0
R4513
L4503
C4512
100
/16
Q4501
DTC114EE-X
3
4
R4210
1M
C4205
R4205
R4253
10K
C4203
0.1
R4255
2.2K
R4254
680K
C4251
3.3
/50
5
100k
0.01
R4209
1M
C4206
0.1
R4214
4.7k
R450
6
26
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