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The MTLC is equipped with a 5 megapixel digital image sensor that provides an active
imaging array of 2,592H x 1,944V. It features low-noise CMOS imaging technology that
achieves CCD image quality. In addition, it incorporates sophisticated camera functions
on-chip such as windowing, column and row skip mode, and snapshot mode.
The sensor can be operated in its default mode or programmed by the user through a simple
two-wire serial interface for frame size, exposure, gain settings, and other parameters.
3-3
contains the pin names and descriptions of the image sensor module.
Signal Name
CAMERA_PIXCLK
CAMERA_D0
CAMERA_D1
CAMERA_D2
CAMERA_D3
CAMERA_D4
CAMERA_D5
CAMERA_D6
CAMERA_D7
CAMERA_D8
CAMERA_D9
CAMERA_D10
CAMERA_D11
CAMERA_STROBE
CAMERA_LVAL
CAMERA_FVAL
CAMERA_RESET_n
CAMERA_SCLK
CAMERA_TRIGGER
CAMERA_SDATA
CAMERA_XCLKIN
MTLC User Manual
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Table 3-3 Pin Assignment of the CMOS Sensor
FPGA
Pin No.
J27
F24
F25
D26
C27
F26
E26
G25
G26
H25
H26
K25
K26
E27
D28
D27
F27
AE26
E28
AE27
G23
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Description
Pixel clock
Pixel data bit 0
Pixel data bit 1
Pixel data bit 2
Pixel data bit 3
Pixel data bit 4
Pixel data bit 5
Pixel data bit 6
Pixel data bit 7
Pixel data bit 8
Pixel data bit 9
Pixel data bit
10
Pixel data bit
11
Snapshot
strobe
Line valid
Frame valid
Image sensor
reset
Serial clock
Snapshot
trigger
Serial data
External input
clock
16
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I/O
Standard
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
Table
www.terasic.com
May 22, 2014
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