Terasic P0158 User Manual

Capacitive multi-touch lcd with camera module

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Page 1 Chipsmall Limited consists of a professional team with an average of over 10 year of expertise in the distribution of electronic components. Based in Hongkong, we have already established firm and mutual-benefit business relationships with customers from,Europe,America and south Asia,supplying obsolete and hard-to-find components to meet their specific needs.
Page 3: Table Of Contents
INTRODUCTION CHAPTER 1 ......................1 1.1 About the Package ............................3 1.2 Setup License for Terasic Multi-Touch IP ....................4 1.3 Assembly of MTLC onto Boards with HSMC Connectors ................ 5 1.4 Connectivity ............................... 7 1.5 Getting Help ............................... 9...
Page 4: Chapter 1 Introduction
Chapter 1 Introduction The Terasic Capacitive Multi-touch LCD and Camera Module (MTLC) is an all-purpose LCD multimedia color touch-screen for FPGA applications and provides multi-touch gesture and single-touch support. A 5-megapixel digital image sensor, ambient light sensor, and 3-axis accelerometer make up the rich feature-set. A HSMC cable is provided to interface with various Terasic FPGA development boards, such as Terasic DE2-115 and TR4 development boards through a HSMC interface on the MTLC.
Page 5  Column and row binning modes to improve image quality when resizing  Simple two-wire serial interface  Programmable controls: gain, frame rate, frame size, exposure Table 1-2 shows the key parameters of the CMOS sensor (Note*). MTLC User Manual www.terasic.com May 22, 2014...
Page 6: About The Package
Note: for more detailed information of the LCD touch panel and CMOS sensor module, please refer to their datasheets respectively. The kit includes everything users need to run the demonstrations and develop custom designs, as shown in Figure 1-2. MTLC User Manual www.terasic.com May 22, 2014...
Page 7: Setup License For Terasic Multi-Touch Ip
Figure 1-2 MTLC kit package contents To utilize the multi-touch panel in a Quartus II project, the Terasic Multi-Touch IP is required for operation. Error messages will be displayed if the license file for the Multi-Touch IP is not added before compiling projects. The license file is located at: MTLC System CD\License\license_multi_touch.dat...
Page 8: Assembly Of Mtlc Onto Boards With Hsmc Connectors
Inside every MTLC kit package, there should be 2 sets of copper pillars, screws, and nuts as shown in Figure 1-5 These parts are used to install the MTLC on the FPGA board through the mounting holes Figure 1-6. shown in MTLC User Manual www.terasic.com May 22, 2014...
Page 9 The HSMC cable should be already connected to the MTLC right out of the box. User only needs to connect the HSMC cable to the HSMC connector on the host board as shown in Figure 1-8. MTLC User Manual www.terasic.com May 22, 2014...
Page 10: Connectivity
Figure 1-9 Fasten screws through the HSMC cable to the copper pillars Here we provide examples of MTLC being connected to different FPGA development boards: Arrow’s SoCKit, TR4, DE2-115, and Altera Cyclone V SoC FPGA development board (C5SoC). MTLC User Manual www.terasic.com May 22, 2014...
Page 11 Figure 1-10 MTLC Connect C5S Figure 1-11 MTLC Connect TR4 Figure 1-12 MTLC Connect DE2-115 MTLC User Manual www.terasic.com May 22, 2014...
Page 12: Getting Help
Figure 1-13 MTLC Connect C5SOC Here is the contact information if you encounter any problem: Terasic Technologies Tel: +886-3-575-0880 Email: support@terasic.com MTLC User Manual www.terasic.com May 22, 2014...
Page 13: Architecture Of Mtlc
Chapter 2 Architecture of MTLC This chapter provides information regarding features and architecture of the Terasic Capacitive Multi-touch LCD and Camera Module. The key features of this module are listed as follows:  800x480 pixel resolution LCD with 24-bit color depth ...
Page 14: Block Diagram Of The Mtlc
Figure 2-1 MTLC PCB and Component Diagram (Top) Figure 2-2 MTLC PCB and Component Diagram (Bottom) Figure 2-3 gives the block diagram of the MTLC board. The HSMC connector houses all the MTLC User Manual www.terasic.com May 22, 2014...
Page 15 HSMC cable. Thus, the user can configure the FPGA to implement any system design. Figure illustrates the connection for MTLC to the Terasic FPGA boards. Figure 2-3 Block Diagram of MTLC Figure 2-4 Connection Diagram of MTLC Kit with Terasic FPGA boards MTLC User Manual www.terasic.com May 22, 2014...
Page 16: Using Mtlc
LCD touch panel. Table 3-1 LCD timing specifications ITEM SYMBOL UNIT NOTE Dot Clock 1/tCLK DCLK pulse duty Tcwh Setup time Tesu Hold time Tehd Horizontal period tCLK Horizontal Valid tCLK Horizontal tCLK MTLC User Manual www.terasic.com May 22, 2014...
Page 17 Horizontal Front Porch thfp tCLK Horizontal Valid tCLK Vertical Period Vertical Pulse tvpw Width tvpw 23th Vertical Back Porch fixed Vertical Front Porch tvfp Vertical Valid Setup time Tdsu Hold time Tdsu MTLC User Manual www.terasic.com May 22, 2014...
Page 18 Left or Right Display LCD_SHLR Control 2.5V Down Display LCD_UPDN Control 2.5V LCD_VSD Vertical sync input. 2.5V TOUCH _I2C_SCL touch I2C clock 2.5V TOUCH _I2C_SDA touch I2C data 2.5V TOUCH _INT_n touch interrupt 2.5V MTLC User Manual www.terasic.com May 22, 2014...
Page 19: Using 5 Megapixel Digital Image Sensor
2.5V CAMERA_LVAL Line valid 2.5V CAMERA_FVAL Frame valid 2.5V Image sensor CAMERA_RESET_n reset 2.5V CAMERA_SCLK AE26 Serial clock 2.5V Snapshot CAMERA_TRIGGER trigger 2.5V CAMERA_SDATA AE27 Serial data 2.5V External input CAMERA_XCLKIN clock 2.5V MTLC User Manual www.terasic.com May 22, 2014...
Page 20: Using The Digital Accelerometer
Table 3-5 Pin names and Descriptions of Ambient Light Sensor Module Signal Name FPGA Pin No. Description I/O Standard LSENSOR_ADDR_SEL Chip select 2.5V LSENSOR_INT Interrupt output 2.5V LSENSOR_SCL Serial Communications Clock 2.5V LSENSOR_SDA Serial Data 2.5V MTLC User Manual www.terasic.com May 22, 2014...
Page 21: Using Terasic Multi-Touch Ip
Terasic Multi-Touch IP is provided for developers to retrieve user inputs, including multi-touch gestures and single-touch. The file name of this IP is i2c_touch_config and it is encrypted. To compile projects with the IP, users need to install the IP license first. For license installation, please refer to section 1.2 Setup License for Terasic Multi-Touch IP...
Page 22 Zoom In 0x48 Zoom Out 0x49 Note: The Terasic Multi-Touch IP can also be found under the \IP folder in the system CD as well as the \IP folder in the reference designs. MTLC User Manual www.terasic.com May 22, 2014...
Page 23: Chapter 4 Mtlc Demonstrations
VIP Video Out is used to display the display content. The display content is filled by NIOS II processor according to users’ input. For multi-touch processing, a Terasic Memory-Mapped IP is used to retrieve the user input, including multi-touch gesture and single-touch coordinates. Note, the IP is encrypted, so the license should be installed before compiling the Quartus II project.
Page 24 3.5 Using Terasic Multi-Touch IP in this document. Figure 4-1 Block Diagram of the Painter Demonstration  Demonstration Source Code  Project directory: Painter  Bit stream used: Painter.sof  Nios II Workspace: Painter \Software  Demonstration Batch File...
Page 25 Figure 4-4 shows the phone when counter-clockwise rotation gesture is detected. Figure 4-5 shows the photo when zoom-in gesture is detected. Figure 4-2 GUI of Painter Demo Figure 4-3 Single Touch Painting MTLC User Manual www.terasic.com May 22, 2014...
Page 26 Figure 4-4 Counter-clockwise Rotation Gesture Figure 4-5 Zoom-in Gesture Note: execute the test.bat under Picture_Viewer\demo_batch will automatically download the .sof and .elf file. MTLC User Manual www.terasic.com May 22, 2014...

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