Working Theorem - LG 566LE Service Manual

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7. WORKING THEOREM

A. DC-DC CONVERTER
This block provides adjustable output voltages of 9.2V, -6V, 18V and 3 to 4V for the panel.
It consists of a Q811 transistor and power switch IC I807 (AIC 1341).
When DC_ EN signal is high, then Q811 is activated and send one signal to activate I807.
At this time I807 will send 200KHz 12V PWM to Q801, Which is connected with L801, Q801,
D812 and C832, to boost 5V to 9.2V. And I807 offers the adjustable voltage of 3V to 4V. By
sending out pulses from pin 2 and pin 16 of I807 to double voltage circuit consisting of C842,
D817, D817 and C847, leaner regulator with Q804, would output –6V, 18V output id created,
according to the rule of –6V creation.
B. Scalaring controller
MV3 scalar is a highly integrated solution that combines a high performance ADC with an
advanced image processing controller. Using advanced image scaling algorithms, MV3 has
intelligently adaptive sub-algorithms that will automatically optimize the display quality for
different images – the text is sharper and the graphics is smoother. The built-in analog interface
includes a 160Mhz, 8-bit 3-channel ADC, preamplifier, and VGA, allowing seamless support to
resolutions from VGA to XGA. MV3 also offers other integrated functions such as an internal
OSD that supports all languages, and build-in line buffers that allows support to a wide range of
LCD panels.
The scalar implements four advanced display technologies:
1. Sampling RGB input signals by fully integrated triple-channel ADC, PLL, and pre-amplifier
2. Automatically calibrate for vertical and horizontal alignment to center display and phase
calibration
3. High-quality advanced scaling: Enhanced and adaptive scaling algorithm for optimal image
quality
4. One and two pixels per clock panel support: Up to 24 bits per pixel.
The panel interface consists of 48-bit panel data bus, Start Pulse(STH1) and Clock (CLKH),
Polarity(POL)/Latch pulse(LP) for source driver IC, Start pulse(STV1) and Clock(CLKV) for gate
driver IC, and Data inversion control(HMSO/HMSE) for odd/even pixel bus and the power supply
(+3.2V, +3.45V<adjustable>,+9.2V, +18Vand-6V) for panel driver IC use.
C. Inverter
In order to drive the CCFLs embedded in the panel module, there is a Half Bridge inverter to
convert by the controller.
The input 12V up to hundreds of AC voltage output.
The inverter is formed by symmetric, in order to drive the separate lamp modules.
The input stage consists of a PWM controller, half bridge inverter, and switching MOSFET to
convert DC input into AC output.
The output stage consists of a tuning capacitor, coupling capacitor transformer, push-pull transistor
pair to boost ac output up to hundreds of voltage.
And one resister is serial to lamp for output cuttent feedback.
There are two signal to control the inverter which com from UP, logic "High" level which send to
I804 is turn on the inverter. "BRI" signal control Brightness by DC level which was integral from
PWM signal.
566LE Service Manual
-17-
7/18/2003