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A
B
MICON SCHEMATIC DIAGRAM
(SCALER PCB)
8
AGC
DTUNER_RESET_L
FROM/TO SCALER
DTUNER_POWER
SDA1
SCL1
AFT
DVB_ASPECT_IN
AGC
SCART1_SW
SCART1_Y
SCART1_SW
SCALER_RESET
7
DVS
POWER_FAIL
SCART1_Y
POWER_ON-H
DVS
DVB_POWER_ON-H
PANEL_ON-H
STANDBY-H
SCALER-H
STEREO_RESET
AUDIO_MUTE
EXT_MUTE-H
4SI_SCL
4SI_SDA_IN
4SI_SDA_OUT
4SI_CHIP_SE
SCALER_RESET
6
REMOCON_IN
STANDBY_LED
DVB_FAN_ON-H
DVB_SW-H
DTUNER_POWER
DTUNER_RESET_L
IIC_OFF
DTUNER_RX
DTUNER_TX
PANEL_ON-H
LCDON
OFL1
DVB_POWER_ON-H
OFL2
LMP_ERR
DVB_ASPECT_IN
LCDON
SCALER_SW
ERPG_ON_H
STANDBY-H
5
ERPG_ON_H
AFT
FROM/TO SYNC SEPA
C_SYNC
KEY-B
KEY-B
KEY-A
KEY-A
KEY-C
SD_SW1
KEY-C
4
FROM/TO RSDS
CONTROLER_RESET
SDA1
SCL1
HSCAN
VSCAN
P.CON+3.3V
3
FROM/TO REGULATOR
P.CON+3.3V
SCALER-H
P.CON+5V
AT+5V
GND
2
AT+3.3V
AT+3.3V
CAUTION: DIGITAL TRANSISTOR
1
A
B
H-17
C
C122
R109
0.1 B
D101
100
UDZS5.6B
NC
NC
NC NC
0
0
0
0
0
2.51
0
0
0
0
0
2.75
75
74
73
72
71
70
69
68
67
66
65
64
C108
3.2
0.1 B
0
NC
START_SW
3.2
D103
NC
DVD_RESET
S807X
0
HDMI_RESET
75 HP_IN
UDZS5.6B
3.2
SCALER_RESET
76 SCALER-H
R120
0
S_DET
4.7K
0
JG103
SCART3_SW
0
JG124
SW_SCART
3.2
IIC_OFF
3.2
LCD_H
IC101
0
MICON
DVB_POWER_ON-H
OEC7162A
S806X
0
NC
3.2
LCDON
0
PANEL_ON
0
PDP_RLY
1.4
AFT
C101 0.1
B
3.2
KEY-B
3.2
KEY-A
JG101
0
AVSS
98
NC
0
NC
99
SDIN
3.2
VREF
100
CLK
3.73
AVCC
0
NC
0
NC
0
NC
1
2
3
4
5
6
7
8
9
10
11
12
3.2 3.4 3.2 3.2
3.2
0
0
0
0
0
0
3.2
3.3
0
29
CAUTION: DIGITAL TRANSISTOR
NOTE:THE DC VOLTAGE AT EACH PART WAS MEASURED
WITH THE DIGITAL TESTER WHEN THE COLOR BROADCAST
WAS RECEIVED IN GOOD CONDITION AND PICTURE IS NORMAL.
C
D
E
R132
4.7K
R133
4.7K
C119
6.3V
220
V-S
C120
0.1 B
NC
NC
NC
3.3
2.75
0
0 3.2
0
0
0 3.4
3.2 3.2 3.2
0
0
63
62
61
60
59
58
57
56
54
53
52
51
55
0
NC
0
0
0
0
JG116
50
SC2_CVBS_OUT-H
0
CLK
JG125
49
SC2_AUDIO_OUT-H
0
SD_SW1
48
LATON
0
P50/^WRL/^WR
47
SDIN
0
NC
3.2
HDMI/DVI
NC
0
VGA/YUV
3.2
CVBS/PC
NC
0
EPM
0
COMPONENT/HDMI
NC
0
OFL2
NC
0
OFL1
NC
0
NC
NC
0
DVB_TX
0
28
SDA1
DVB_RX
0
27
SCL1
(RTS0)
0
26
LMP_ERR
(CLK0)
3.2
RX
3.2
TX
3.2
3.2
0
13
14
15
16
17
18
19
20
21
22
23
24
25
3.09
3.2 3.2
3.3
3.16
3.2
0
0
3.2
0
0
3.2
0
NC
NC
R127
4.7K
D108
RB520S-30-TE61
C117
0.1 B
R134
R126
10K
4.7K
RB520S-30-TE61
NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
D
E
F
G
DVB_SW-H
DVB_FAN_ON-H
AUDIO_MUTE
EXT_MUTE-H
R139
EEPROM_SCL
R145
100
EEPROM_SDA
100
P.CON+5V
SW
5.0
Q102
0
KRA103SRTK
0
SW
4.9
Q101
KRC103SRTK
R137
STEREO_RESET
10K
HSCAN
VSCAN
SD_SW1
AT+3.3V
AT+3.3V
7
SCALER_RESET
6
RESET
4SI_CHIP_SE
CHIP_SELECT
5
4SI_SCL
4SI_SCL
4
4SI_SDA_IN
SCALER_SW
4SI_SDA_IN
3
4SI_SDA_OUT
4SI_SDA_OUT
2
GND
1
R144
A2001WV2-7P
PC_CONTROL
CP103
4.7K
R147
DTUNER_TX
100
R148
DTUNER_RX
100
RTS0
CLK0
R146
RX
R141
100
TX
CP101
A2001WV2-5P
100
1
GND
EEPROM_SCL
2
EEPROM_SCL
EEPROM_SDA
3
EEPROM_SDA
LMP_ERR
IIC_OFF
4
IIC_OFF
5
GND
0
0
NC
TX
NC
5
4
RX
NC
NC
RTS0
CLK0
OUT
IN
GND
1
2
3
3.4
3.4
0
D107
CNVSS
AT+5V
EEPROM_SCL
EEPROM_SDA
5
6
7
8
4
3
2
1
0
0
0
0
F
G
H
8
7
6
5
4
3
ROM WRITER
MICON_DATA
CP102
A2001WV2-10P
GND
1
TX
2
BUSY
3
NC
NC
4
VCC
5
CLK
6
RX
7
CNVSS
8
RESET
9
2
GND
10
1
PCBDS0
CEF197
H
H-18
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