Advertisement
KBR0, KBR1, KBR2, KBR3, KBR4
H2, H1, H3, G5, G3
( Keyboard )
KBC0, KBC1, KBC2, KBC3, KBC4
J5, J3, J2, J1, J4
KEYPAD
K3
BKLT_EN
DISPLAY
DP_EN_L
A11
INTERFACE
RSTO
E9
SIM
E7
CLKO
INTER
SIM_TX
F3
FACE
SIM_RX
B5
HEAD_INT
N3
N2
STEREO_HEAD_INT
CLK_SELECT
A1
TX_EN
C1
CTM
DM_CS
E2
MODULE
TX_KEY
E1
RX_EN
E3
RX_ACQ
E4
RESET
P2
( SDTX ) BDX
B6
( TX_CLK ) BCLKX
B3
SERIAL
( SCLK_OUT ) BCLKR
INTER
from / to MAGIC
B4
( SDFS ) BFSR
FACE
D4
( SDRX ) BDR
A3
DSC_EN
DSC
J6
TP864
FM_PILOT0
L2
L3
FM_PILOT1
FM_PILOT2
M1
FM
FM_PILOT3
L4
INTER
MO_ST
C2
RW_AM_FM
M2
FACE
N1
DATA_AM_FM
D2
CLK_AM_FM
TP865
B+
CHARGER JACK
J904
EXT_B+
CHRG_SW
R606
MAN_TEST_AD
R604
A1
BATT_THERM_AD
B3
GND
V2
TP866
C4
RESET
ON*
TP875
G5
UPLINK
D2
TP877
C3
DOWNLINK
TP878
MIC
J2
HEAD_INT
MIC
STEREO_HEAD_INT
AUX_MIC
H3
U1500
J504
13
V2
10
HEADSET_R
19
SPR-
12
FM_R
11
HEADSET_L
1
9
FM_L
SPKR
Stereo Audio
DX2
C1026
16
Headset Jack
MQSPI_CS2
15
MQSPI_CLK2
ALRT
14
FMin (FM ANT.)
VDDS
C4, H4, K06
WHITE_CAP
VCC_MEMIF
C!4, F10, K13, P13
U700
VDD
A9, A10, K10, M8, M11
G12
VCCA
( CE ) MQSPI_CS1
N8
SPI
( SPI_CLK ) MOSPI_CLK1
K7
INTERFACE
( SPI_DATA ) DX1
M7
M
E
M
O
R
Y
I
CPU
N
C9
T
E10
E
R
B11
F
A
D9
C
B9
E
CTM
F3
DSP
L7
ENABLE
K4
CHARGE
TRKL_SET
CHARGE_SW
N7
SPI
TIMER
INTERFACE
B7
P4 H10
F5
A7 B7
C7
CLK
F6
SPI
REAL TIME
RESET
LEVEL
INTERFACE
J7
CLOCK
SIM_I/O
SHIFT
J8
U900
K7
G6
SENSE
K10
G_CAP2
H8
CNTL.
D10
C8
Logic Control
G4
G9
VREF
REG.
V3
B5
REG.
E1
J5
V2
REG.
A6
V1
REG.
C6
VSIM
Interface
REG.
Audio
Codec
VBOOST1
F7
REG.
H6 H7 K9
H9
K5 E10
J9
B10
3
CR902
1,2,5,6
4
Q903
L901
ALRT_VCC
B+
V2
V3
( MAGIC SPI )
DATA BUS
ADDRESS BUS
SR_VCC
D6, E1
V2
CE2
B2
U702
RESET
CE3
A1
SRAM
R_W
G5
CE0
CE1
DEEP SLEEP
CIRCUIT
STBY_DL
(Magic)
V1
Q913
SW_V1
EXT_B+
Q960
TRKL_SET
6
J900
SIM
4
Con.
5
1
2
VSIM1
RSTO
Mode
Full Rate High Trickel Low Trikel
CLKO
Current
300mA
SIM_TX
SIM_RX
TRKL_SET
Low
ENABLE
High
PWR_ON
PWR_SW
STBY_DL
VREF
2.775V for Magic
V3
1,8V, for WhiteCap
SR_VCC
2.775V, for SRAM
V2
2.775V, for WhiteCap logic outputs, RAM, FLASH, EEPROM
V1
5.0V, for DSC Bus, Negative Voltage Regulator
VSIM1
3.0 or 5.0V, for SIM Card Circuit
Internal GCap use only (VSIM1, LS_V1)
V_BOOST1
C913
ALRT_VCC
V1
A5, E1, F5
2
U701
-5V
1
B4
U903
EPROM
4
1
EEPROM
B3
U904
-10V
D7
F8
( White Cap )
BATTERY
CONTACTS
CHARGER
CR960
R962
B+
B+
U960
ISENSE
8
1
7
2
COVIC
3
6
PWR_ON
4
5
ENABLE
Off
100mA
40mA
<1mA
FMin
High
Low
High
Low
Low
High
40
3
VCO
6
TUNE
9
FM_L
15
FM_R
16
FM_PILOT0
FM_PILOT1
Q1014
Q1015
FM_PILOT2
FM_PILOT3
RX SIGNAL PATH
TX SIGNAL PATH
MAIN VCO SIGNAL PATH
GSM SERVICE SUPPORT GROUP
TUNING VOLTAGES
LEVEL 3 AL Block Diagram
REFERENCE CLOCK
Orderable Part
Ralf Lorenzen, Michael Hansen, Ray Collins
Non - Orderable Part
J902
Display Con.
D7 - D0
5 - 12
A0
3
13
V2
RESET
2
4
R_W
DP_EN_L
1
GND
17, 18, 14
15
-5V
KBR0 - KBR4
( WhiteCap )
KBC0 - KBC4
KEYBOARD
( GCAP2 )
PWR_SW
( GCAP2 )
V2
( GCAP2 )
ALRT_VCC
BACKLIGHT
BKLT_EN
V2
J605
BATT_THERM_AD
J604
RW_AM_FM
(TP1002)
43
36
38
31
30
DATA_AM_FM
(TP1003)
29
U1001
CLK_AM_FM
(TP1004)
FM IC
FM_RSSI
22
(TP1001)
MO_ST
26
10
19
152kHz
Q1030
(TP1000)
Y1003 10,7 MHz
27.03.00
Rev. 1.3
Dualband SHARK
Page1
Advertisement
