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RS9110-N-11-02
Module Integration Guide
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September 26
2011
Redpine Signals, Inc.
2107 N. First Street, #680
San Jose, CA 95131.
Tel: (408) 748-3385
Fax: (408) 705-2019
Email:
info@redpinesignals.com
Website:
www.redpinesignals.com
Redpine Signals, Inc. Proprietary and Confidential
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Related Manuals for Redpine Signals RS9110-N-11-02
Summary of Contents for Redpine Signals RS9110-N-11-02
- Page 1 RS9110-N-11-02 Module Integration Guide September 26 2011 Redpine Signals, Inc. 2107 N. First Street, #680 San Jose, CA 95131. Tel: (408) 748-3385 Fax: (408) 705-2019 Email: info@redpinesignals.com Website: www.redpinesignals.com Redpine Signals, Inc. Proprietary and Confidential...
- Page 2 About this Document: The RS9110-N-11-02 is an 802.11n single-stream module with built-in MAC/BBP, RF and PA, and front-end components. It interfaces to a host processor through an SDIO or SPI interface. This document provides information that may be used while integrating the module into an end solution.
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Page 3: Table Of Contents
SPI Interface ..............5 Bill of Materials ..............7 SDIO Interface Integration ..........7 SPI Interface Integration............ 8 Recommended RS9110-N-11-02 PCB Landing Pattern ..10 Circuit and Layout Guidelines .......... 11 Chip Antenna Layout Recommendations......13 Antenna Matching Network ..........14 Reference Oscillator Specifications ......... -
Page 4: Reference Schematics
Tantalum OPTIONAL NOTE::If required C7 can be increased to 22uF for further improving the Transmit Rev6.1 Ver6.1 Redpine Signals Confidential Title RS9110-N-11-02 SDIO - Reference Schematics Size Document Number Custom <Doc> Date: Tuesday, September 20, 2011 Sheet Figure 1 SDIO Interface Integration NOTE: Pull up resistors should be present on SDIO CMD &... -
Page 5: Spi Interface
Tantalum OPTIONAL NOTE::If required C7 can be increased to 22uF for further improving the Transmit Rev6.1 Ver6.1 Redpine Signals Confidential Title RS9110-N-11-02 SPI - Reference Schematics Size Document Number Custom <Doc> Date: Monday, September 26, 2011 Sheet Figure 2 SPI Interface Integration Redpine Signals Inc. - Page 6 SPI_CS and a pull up (CPOL=1)/pull down(CPOL=0) on the SPI_CLK. The value of pull up/ pull down resistor should follow the recommendations as given on the HOST side. Redpine Signals Inc. Proprietary and Confidential Page 6...
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Page 7: Bill Of Materials
Lite-On Inc LTST-C190KGKT CMS02 Schottky Diode Toshiba CMS02TE12L,Q ANTENNA TUNING NETWORK Z1,Z2,Z3 Refer to the description in the schematic. Murata GRM1555C1H8R2CZ01D Sample part number for Z1 given here. IC'S 40MHz Crystal Oscillator 7C40000192 Redpine Signals Inc. Proprietary and Confidential Page 7... -
Page 8: Spi Interface Integration
CHIP RES 33R 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ330X 3.9K to 4.7K 820E CHIP RES 820R 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ821X R4,R5,R6 RES 1.0K OHM 1/16W 5% 0402 SMD 0402 Yageo RC0402JR-071KL INDUCTORS Redpine Signals Inc. Proprietary and Confidential Page 8... - Page 9 CER CHIP C 0.1U 10% X5R 0402 6.3V 0402 Murata GRM155R61A104KA01D 4.7K CHIP RES 4K7 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ472X 100K CHIP RES 100K 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ104X 16MBIT Serial Flash WSON SST25VF016B-75-4I-QAF-T Redpine Signals Inc. Proprietary and Confidential Page 9...
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Page 10: Recommended Rs9110-N-11-02 Pcb Landing Pattern
3 Recommended RS9110-N-11-02 PCB Landing Pattern Figure 3 PCB Landing Pattern Redpine Signals Inc. Proprietary and Confidential Page 10... -
Page 11: Circuit And Layout Guidelines
4 Circuit and Layout Guidelines The following are guidelines for integrating the RS9110-N-11-02 module into a wireless LAN solution. 1. The WLAN module has a central ground pad of size 2.5mm x 2.5mm. An application’s layout must have a provision to include this. - Page 12 8. The design of the embedded system should provide for a peak power load of 325mA. Redpine Signals Inc. Proprietary and Confidential Page 12...
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Page 13: Chip Antenna Layout Recommendations
This can be a useful tuning method although this kind of short trace should have little effect which can be observed on a Network Analyzer. It is recommended to characterize the antenna portion using a Network Analyzer. Redpine Signals Inc. Proprietary and Confidential Page 13... -
Page 14: Antenna Matching Network
Antenna part, Customers layout, Gnd plane in the layout & other components in the system which could affect the radiation pattern of the Antenna. Please use a Network Analyzer to optimize the values of the match network for the best return loss. Redpine Signals Inc. Proprietary and Confidential Page 14... - Page 15 L=3nHto3.9nH Ground Plane Figure 5 Antenna Matching Network Note: The radiation pattern of the Antenna can be studied in an Anechoic Chamber using a Network Analyzer & a Horn Standard Gain Antenna Redpine Signals Inc. Proprietary and Confidential Page 15...
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Page 16: Reference Oscillator Specifications
Rise time/Fall time < 10 Periodic Jitter 30 ps pk-pk Typical Spec of the Oscillator we use Wake-up time from Standby < 1 Wake-up time from power-on < 5 Standby current < 20 Redpine Signals Inc. Proprietary and Confidential Page 16... -
Page 17: List Of Recommended Crystal Oscillators
7. Epson Toyocom SG 211-SCE 8. Golledge GXO-5332L/E 40.0MHz ECS EC-2532HS Note: Before finalizing the choice of a crystal oscillator, it is advisable to carry out detailed EVM measurements on a prototype or evaluation board. Redpine Signals Inc. Proprietary and Confidential Page 17... -
Page 18: Recommended Specifications For Schottky Diode
• Forward voltage: VFM = 0.40 V (max) • Average forward current: IF (AV) = 3.0 A • Repetitive peak reverse voltage: VRRM = 30 V 7.1 Recommended Parts a) Toshiba part number CMS02 b) NXP part number PMEG3030BEP Redpine Signals Inc. Proprietary and Confidential Page 18... -
Page 19: Sample Layout
8 Sample Layout This section provides a sample layout of a board that instantiates RS9110-N-11-02. This reference board is an SDIO module with a standard interface into an SDIO slot. 8.1 Top Layer Redpine Signals Inc. Proprietary and Confidential Page 19... -
Page 20: Layer 2
8.1 Layer 2 8.2 Layer 3 Redpine Signals Inc. Proprietary and Confidential Page 20... -
Page 21: Bottom Layer
8.3 Bottom Layer 8.4 Component Placement Redpine Signals Inc. Proprietary and Confidential Page 21... -
Page 22: Appendix
3. If reset to Redpine module is from RC circuitry, 3.3V input to RC circuit should be from voltage regulator output. If reset is controlled from microprocessor GPIO pin, then the reset has to be asserted for a minimum of 10ms after the SD0_PWR# signal. Redpine Signals Inc. Proprietary and Confidential Page 22...
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