Block Diagram - Roland SP-505 Service Notes

Oct.2001

BLOCK DIAGRAM

fig.block
Data
Address
Clock
22
+9V
AC IN
(BRC-*V )
REGULA TOR
+3V SW
REGULA TOR
REGULA TOR
16M
DRAM
(Work)
MIDI OUT
MI DI IN
FOOT SW
SW
CTRL
Mai n Board
+5V
DRAM
8M
FLASH
MEMORY
(Progra m)
CPU
V850
Xí tal 1
DRIV ER
LED
ENC
4M
DSP
(MR2)
D/A Data
A/D Data
GATE ARREY
NAND
Flash
(Wave)
DIGITAL IN IF
SMART
MEDIA
LCD
UNIT
SW Boar d
A/D
D/A
PLL
Xí tal 2