Dsp Main Features; System Logic Main Features; Memories; Audio-Rf - Nokia NSW-6 Series Technical Documentation Manual

PAMS Technical Documentation

DSP Main Features

DSP (Digital Signal Processor) is in charge of the channel and speech
coding according to the IS–136 specification. The block consists of a DSP
and internal ROM and RAM memory. The input clock is 9.72 MHz, and
DSP has its own internal PLL–multiplier. Main interfaces are to MCU, and
via System Logic to COBBA and RF.

System Logic main Features

– MCU related clocking, timing and interrupts (CTIM)
– DSP related clocking, timing and interrupts (CTID)
– DSP general IO–port
–reset and interrupts to MCU and DSP
– interface between MCU and DSP (API)
– MCU interface to System Logic (MCUif)
– MCU controlled PWMs, general IO–port and USART for MBUS (PUP)
– Receive Modem (Rxmodem)
– Interface to Keyboard, CCONT and LCD Drivers (UIF)
– Interface to MCU memories, address lines and chip select decoding
(BUSC)
– DSP interface to System Logic (DSPif)
– serial accessory interface (AccIf, DSP–UART)
– Modulation, transmit filter and serial interface to COBBA (MFI)
– Serial interface for RF synthesizer control (SCU)

Memories

The speed of FLASH and SRAM is 120 ns.
FLASH
– size 1024k * 16 bit, contains the main program code for the MCU, and
is able to emulate EEPROM.
SRAM
– size 128k * 16 bit
AUDIO–RF
Audio interface and baseband–RF interface converters are integrated into
COBBA circuit.

COBBA Main Features

The codec includes microphone and earpiece amplifier and all the neces-
sary switches for routing. There are two different possibilities for routing;
Issue 1 12/99
E Nokia Mobile Phones Ltd.
NSW-6
System Module SE2
Page 17