PLX Technology ExpressLane PEX 8624-AA Quick Start Hardware Design Manual
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PLX Technology ExpressLane PEX 8624-AA Quick Start Hardware Design Manual

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PEX 8624-AA Quick Start
Hardware Design Guide
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Version 1.2
October, 2007
www.plxtech.com
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800 759-3735
408 774-9060
408 774-2169

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Summary of Contents for PLX Technology ExpressLane PEX 8624-AA

  • Page 1 PEX 8624-AA Quick Start Hardware Design Guide Version 1.2 October, 2007 Website: www.plxtech.com Support: www.plxtech.com/support Phone: 800 759-3735 408 774-9060 Fax: 408 774-2169...
  • Page 2 © 2007 PLX Technology, Inc. All Rights Reserved. PLX Technology, Inc. retains the right to make changes to this product at any time, without notice. Products may have minor variations to this publication, known as errata. PLX assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of PLX products.

  • Page 3: Table Of Contents

    BGA Routing Escape and De-Coupling Capacitor Placement............18 Add-In Board Routing ........................20 System Board Routing........................21 Midbus Routing..........................21 PCB Layer Stackup Considerations ....................22 References............................23 PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.
  • Page 4 Table 2. PEX 8624 LED On/Off Patterns, by State ..................12 Table 3. Configuration Strapping Balls ....................... 13 Table 4. STRAP_RESERVED Ball External Pull-Up/Pull-Down Resistor Requirements ......13 PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 5: Preface

    October 5, 2007 Applied miscellaneous corrections and enhancements. Revised Table 4 pull-up/pull-down resistor recommendations for STRAP_RESERVED[2:0]. October 17, 2007 Applied miscellaneous corrections and enhancements. PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.
  • Page 6 THIS PAGE INTENTIONALLY LEFT BLANK. PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 viii © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 7: Introduction

    Introduction This quick start hardware design guide is an overview of PLX Technology’s ExpressLane™ PEX 8624 PCI Express Switch and provides examples of how to connect to the various switch interfaces. Switch Interfaces The PEX 8624 device is a 24-Lane, 6-Port PCI Express Gen2 switch, designed for high-availability and high-performance systems.

  • Page 8: Pci Express Link Interface

    PCI Express Link. Device 1 Device 2 Channel CDR1 PLL2 Channel CDR2 PLL1 RefClk Figure 1. Sample PCI Express Link Block Diagram PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 9: Transmitter

    The standard de-emphasis level is selectable by way of the PEX 8624 Link Control 2 register Selectable De-Emphasis bit (Configuration register, offset 98h[6]). 400mV VTX-DC-CM TXp - TXn 800mV Figure 2. Single-Ended versus Differential Voltage PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.
  • Page 10 Station-dependent registers for Station 1. Because the Transmitter Control registers are Station-dependent, Port 4 must be used to program these registers for Station 1. PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 11: Receiver

    Station-dependent registers for Station 1. Because the Transmitter Control registers are Station-dependent, Port 4 must be used to program these registers for Station 1. PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 12: Reference Clock

    DC-biasing circuit, and therefore, should be AC-coupled from the RefClk source driver. Use 0.01 to 0.1 µF capacitors (0603- or 0402-size) to AC-couple the Reference Clock input, as illustrated in Figure PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 13: Channel

    Channel length is allowable is to simulate the Channel, using PLX-provided HSPICE models. The PCI Express Base Specification, Revision 2.0, provides additional details for simulating a Channel. PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 14: Nt Function

    NT functions, through the PEX 8624’s NT Strapping balls. Figure 5. Enable NT Function with NT Strapping Balls Figure 6. Disable NT Function with NT Strapping Balls PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 15: Hot Plug Controller Interface

    PEX 8624’s PHPC to the external circuit, to build a complete PHPC circuit. Figure 7. PHPC Circuit Block Diagram PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 16: Figure 8. Shpc Interface To Pex 8624 Block Diagram

    Output signal, INT#, should be connected to the PEX 8624’s Interrupt Input ball, SHPC_INT#, for the PEX 8624 to service input events at the SHPC. Figure 8. SHPC Interface to PEX 8624 Block Diagram PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 17: Jtag Interface

    25 MHz, a 15-ohm series terminator can be added to TCK, TDI, and TDO, to improve signal quality. Figure 9 illustrates a generic JTAG interconnection. Figure 9. JTAG Interface Block Diagram PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 18: C Interface

    Blinking, 1.5 seconds On, 0.5 seconds Off Link is up, 2.5 GT/s, reduced Lanes are up Blinking, 0.5 seconds On, 1.5 seconds Off PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 19: Strapping Balls

    Must be tied High STRAP_RESERVED8 Must be tied directly to Ground (VSS) STRAP_RESERVED16 Must be tied directly to Ground (VSS) STRAP_RESERVED17# Must be tied High PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 20: Gpio Balls

    The recommendation is that 0201-sized capacitors be used in close proximity to these power balls, as illustrated in Figure Figure 11. Power Balls and Capacitor Placement PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 21: Power Sequencing

    Power supplies isolated through the use of ferrite beads typically have limited access to interplane capacitance, which might have an adverse effect on a given supply rail. 1.9.2 Power Sequencing There is no power sequencing requirement. PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 22: Board-Level De-Coupling

    3.3V 2.5V 1.5V 0.0100 1.0V 0.0010 0.0001 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 1.E+09 Frequency - Hz Figure 12. Power Plane Impedance versus Frequency PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 23: Figure 13. Capacitor Footprint Effects On Series Inductance

    Figure 13 illustrates examples of how various footprints for 0603-size capacitors can change series inductance. Figure 13. Capacitor Footprint Effects on Series Inductance PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 24: Pcb Layout And Layer Stackup Considerations

    Figure 11 illustrates the placements of 0201 de-coupling capacitors underneath the PEX 8624. PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 25: Figure 14. Top Layer Bga Layout And Routing Escape

    Figure 14. Top Layer BGA Layout and Routing Escape Figure 15. Inside Layer BGA Layout and Routing Escape PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 26: Add-In Board Routing

    Differential pairs for PCI Express Gen2 add-in boards should have a differential impedance between 68 to 105 ohms (85 ohms, nominal). Figure 16. Add-in Board Routing to PCI Express Gold Fingers PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 27: System Board Routing

    Transmitter differential pairs route on one side of the footprint, while Receiver differential pairs route through the other side. Figure 18. PCI Express Midbus Routing Example PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 28: Pcb Layer Stackup Considerations

    Typically, stripline traces are only available for PCBs with six or more layers. Microstrip and stripline traces each have their own properties, which must be weighed when determining which type of trace to use. PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

  • Page 29: References

    PCI Express Card Electromechanical (CEM) Specification, Revision 2.0 Right the First Time: A Practical Handbook on High Speed PCB and System Design, by Lee Ritchie PEX 8624-AA Quick Start Hardware Design Guide, Version 1.2 © 2007 PLX Technology, Inc. All Rights Reserved.

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