LG FLATRON L1810B Service Manual page 30

SDA
Start/Stop
Logic
WP
SCL
Slave Address
Comparator
A0
A1
A2
Figure 2-1. S524A40X10/40X20/40X40 Block Diagram
Control Logic
Word Address
Pointer decoder
D and ACK
OUT
HV Generation
Timing Control
EEPROM
Cell Array
Row
128 x 8 bits
256 x 8 bits
512 x 8 bits
Column Decoder
Data Register