Philips 47PFL5403 Service Manual page 99

Circuit Descriptions, Abbreviation List, and IC Data Sheets
Figure 9-4 Power Supply Architecture
9.4 Front-End
9.4.1 Tuner Diversity
The following analogue tuners/splitters are used:
• AP: UV1316E tuner.
• China: UV1356 tuner.
• China Digital: UV1356 tuner with UV1356L splitter
(optional).
A switchable video SAW filter is used to switch between
systems M (signal SAW_SW = logic 0) and B, G, D, K, I (signal
SAW_SW = logic 1).
Refer to figure "Front-end implementation" for details.
RF IF
TUNER
SDA SCL AGC
SWITCH
GND
SAW_SW (pin23 of M30620SPGP)
Figure 9-5 Front-end implementation
9.5 Video Processing
The video processing is completely handled by the Trident SVP
WX69 video processor which features:
• Intergrated HDMI receiver with HDCP up to 162 MHz
(UXGA) with XVYCC Colour Space support
• 30-bit digital input supporting HDMI 1.3 RGB 10-bit
applications
• Integrated 7th Generation Motion and Edge Adaptive
De-interlacing
• Integrated ADC
• Scan Rate Conversion improvement
• PC Auto Tune
• Dual 8/10 LVDS transmitter
• Advanced 7th Generation Cubic-4 Image Scaling Engine
• DNR-Digital Temporal and Spatial Noise Reduction Filter
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SAW FILTER
SCL SDA
AUDIO
SIF1
SIF2
TDA9886
VIF1
SAW FILTER
1 VIF2
VIDEO
TAGC CVBSOUTIF
B,G,D,K,I / M
2
38.9MHz
38.0MHz (for China)
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• Advanced Chroma Processing
• Judder Free Nature Motion Controller
• Perfect Colour Management
• Real Colour Reproducer
• Dynamic Contrast Improvement
• Integrated 7th Generation Motion Adaptive 3D Digital
Comb Video Decoder with Programmable Filter
• Inverse Colour Space Conversion
• Mosquito NR and Block NR with No Details Lost
• Interlaced and Progressive Scan Refresh
• Frame Rate Conversion
• PWM
• Fast Blank
• Teletext
• Memory Interface
• DCRe Advanced Image Processing
• Multi Screen Display Modes
• OSD and VBI/Closed Caption
• Advanced OSD Engine
9.5.1 System Overview
Refer to figure "System Overview" for details.
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TV - RF CVBS input
AV- CVBS input
Side AV- CVBS/YC input
VGA-RGB analog PC input
CVI-YPbPr input
HD
HDMI 30 bit input
LC07 uses 24 bit input
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LC8.2A LA
1.2V 2.5V 3.3V
Address (0:7)
Data (0:7)
WX69
Address
Data
Figure 9-6 System Overview
9. EN 99
CVBS output 1
CVBS output 2
BL Dimming PWM output
Single/Dual LVDS output
Flash Memory
Data (0:19) Address (0:7)
Microprocessor
2M x 16Bit x 4 Banks
2x DDRs
2.5V/2.6V
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