Siemens A70 Service Repair Documentation page 27

Company Confidential
Copyright 2005© Siemens AG
C166S MCU
The C166S is a 16-bit CMOS (Complementary Metal Oxide Silicon) microcontroller. It
contains a CPU (Central Processing Unit) core (the MCU) and a set of peripherals.
The architecture of the MCU combines both RISC (Reduced Instruction Set Computing) and
CISC (Complex Instruction Set Computing) architecture.
• High Performance 16-Bit MCU with a four-stage pipeline:
– 38 ns minimum instruction cycle time with most instructions executed in 1 cycle (2
clock ticks)
– 192 ns multiplication (16-bit x 16-bit), 384 ns division (32-bit/16-bit)
– Parallel use of multiple high bandwidth internal data buses
– Register based design with multiple variable register banks
– Single cycle context switching support
– 16 MBytes linear address space for code and data (von Neumann architecture)
– System stack cache support with automatic stack overflow/underflow detection.
• Control Oriented Instruction Set with High Efficiency:
– Bit, byte, and word data types
– Flexible and efficient addressing modes for high code density
– Enhanced boolean bit manipulation with direct addressing of 6 Kbits for peripheral
control and user defined flags
– Hardware traps to identify exception conditions during runtime
– HLL support for semaphore operations and efficient data access.
• External Bus Interface:
– Demultiplexed bus configurations
– Segmentation capability and chip select signal generation
– 8-bit or 16-bit data bus
– Bus cycle characteristics selectable for five programmable address areas.
• 16-Priority-Level Interrupt System:
– Up to 112 interrupt nodes with separate interrupt vectors
– 16 priority levels and 8 group levels.
• 16-Channel Peripheral Event Controller (PEC):
– Interrupt driven single cycle data transfer
– Transfer count option (standard MCU interrupt after programmable number of PEC
transfers)
– Long Transfer Counter
– Channel Linking
– Eliminates overhead for saving and restoring system state for interrupt requests.
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