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2 x 15 W CS4525 Digital Amplifier Reference Design
Features
Output Filters Optimized for 8 Ω Loads
Delivers 15 W/Ch into 8 Ω at 0.5 % THD+N
Single-Ended 2 V
RMS
Optical and Coaxial S/PDIF Inputs
Demonstrates EMI Compliant Design per FCC
Class B Part 15 and CISPR 22 Standards
Flexible I/O Headers Provided
–
PCM Input Signal Interface
–
Auxiliary Serial Port Signal Interface
–
Delay Port Signal Interface
–
PWM Logic Level Signal Interface
Optional CRD4412A Daughter-Card for
Subwoofer Channel
–
Implements a 2.1 Configuration
Demonstrates Recommended 4-Layer Layout
and Grounding Arrangements
+18 V Switching Mode Power Supply Included
Can be operated by On-Board Controls or with
®
Windows
Compatible Graphical User
Interface
Stereo Analog
Inputs
Optical
Receiver
CS8416
S/PIDF
Receiver
Coaxial Input
USB
I/O
http://www.cirrus.com
Stereo Analog Inputs
PCM
Input
Header
Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
Description
The CRD4525-Q1 demonstrates the CS4525 digital
PWM controller with integrated power stages. This ref-
erence design implements a two-channel amplifier that
delivers 15 W per full-bridge channel into 8 Ω loads us-
ing a single +18 V supply. The CRD4525-Q1 is
powered by an included 80 W switching mode power
supply.
Standard RCA phono jacks are provided to easily inter-
face analog input signals with the evaluation board.
Optical and coaxial inputs are provided to interface with
S/PDIF digital audio input signals.
The PWM audio power outputs are routed through an
inductor/capacitor 2
move high-frequency components from the output
signal, effectively converting it from digital to analog.
The Windows software provides a GUI to make config-
uration of the CRD4525-Q1 easy. The software
communicates through the PC's USB port to configure
the control port registers so that all features of the
CS4525 can be evaluated. Additionally, control over ba-
sic functions is possible via on-board hardware controls
without the need to attach the CRD4525-Q1 to a PC.
ORDERING INFORMATION
CRD4525-Q1
CS4525
CRD4412A Interface Header
Micro-controller
Tactile Controls
Included 18 V Power Supply
CRD4525-Q1
nd
order low-pass filter (LPF) to re-
CS4525 Reference Design
Output
Filter
Speaker
Connector
Output
Filter
Aux Port Header
Status LED's
Power
Jack
Ω
8
8
Ω
OCTOBER '07
DS804RD4
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Related Manuals for Cirrus Logic CS4525
Summary of Contents for Cirrus Logic CS4525
- Page 1 CRD4525-Q1 2 x 15 W CS4525 Digital Amplifier Reference Design Features Description Output Filters Optimized for 8 Ω Loads The CRD4525-Q1 demonstrates the CS4525 digital PWM controller with integrated power stages. This ref- Delivers 15 W/Ch into 8 Ω at 0.5 % THD+N erence design implements a two-channel amplifier that delivers 15 W per full-bridge channel into 8 Ω...
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Page 2: Table Of Contents
1.10 External Power Stage Interface ..................... 6 2. PC SOFTWARE CONTROL ........................7 2.1 CS4525 Main Controls Tab ......................7 2.2 CS4525 Aux & Filter Controls Tab ....................8 2.3 S/PDIF Input Controls Tab ....................... 9 2.4 Register Maps Tab ......................... 10 2.5 Pre-Configured Script Files ...................... - Page 3 CRD4525-Q1 Figure 16.THD+N vs. Frequency ......................25 Figure 17.FFT at -60 dB Input ........................26 Figure 18.FFT at 0 dB Input ........................27 Figure 19.Inter-Modulation Distortion of 19 kHz + 20 kHz ................ 28 Figure 20.Thermal De-Rating Curve for a Typical CRD4525-Q1 .............. 29 Figure 21.Test Facility Setup ........................
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Page 4: System Overview
Cirrus Logic FlexGUI software. System Clocking A 24.576 MHz parallel resonant crystal, Y1, is available to provide a clock source to the CS4525. The crystal is mounted in pin sockets, allowing easy removal or replacement. Alternatively, an input SYS_CLK signal can be provided on pin 3 of the serial audio input header (J2). -
Page 5: Analog Inputs
RCA connectors supply the CS4525 analog inputs through single-ended passive circuits with one pole of input filtering. A resistive attenuation network is implemented to allow 2 V input levels to be supplied to the CRD4525-Q1. Refer to the CS4525 data sheet for the maximum input signal level at the analog input pins. Speaker Outputs The CS4525 power outputs are configured for stereo full-bridge operation. -
Page 6: External Power Stage Interface
Without the CRD4412A attached, the CRD4525-Q1 configures itself for 2-channel stereo full-bridge opera- tion. When the CRD4412A is attached, the CS4525 enables its bass manager and routes the LFE channel to the CRD4412A which amplifies the signal in mono parallel full-bridge mode. Together, the CRD4525-Q1 and CRD4412A implement a 2.1 configuration. -
Page 7: Pc Software Control
CS4525 Main Controls Tab The CS4525 Main Controls tab provides a high-level, intuitive interface to many of the basic configuration options of the CS4525. Use this tab to access functions such as power-down, input source, and volume con- trol. Figure 2. CS4525 Main Controls Tab... -
Page 8: Cs4525 Aux & Filter Controls Tab
Parametric Equalization, Bass Manager, and Tone Control features of the CS4525. Using this utility, the user can graphically configure any or all of the five on- chip bi-quad filters, the Bass Manager crossover frequency, and the bass/treble shelving filters available in the CS4525. -
Page 9: S/Pdif Input Controls Tab
CRD4525-Q1 S/PDIF Input Controls Tab When the CRD4525-Q1 is configured to make use of the CS8416 S/PDIF receiver, the devices must be configured for proper operation. The S/PDIF Input Controls tab provides a high-level, intuitive interface to the most common configuration options of the CS8416. Figure 4. -
Page 10: Register Maps Tab
Within the Register Maps tab, the CS4525 tab is used to access the CS4525’s internal registers, and the CS8416 tab is used to access the CS8416’s internal registers. -
Page 11: Pre-Configured Script Files
Using the pre-configured script file named “Analog In.fgs”, an analog input signal applied to the analog inputs of the CRD4525-Q1 will be used as the CS4525’s input source. The device will be powered up with no internal processing active and the master volume control set to -20 dB. -
Page 12: Stand-Alone Mode Control
Figure 13 on page 22 shows the bottom layout. The decoupling capacitors are located as close to the CS4525 as possible. Extensive use of ground plane fill in the evaluation board yields large reductions in radiated noise. Power Supply Decoupling Proper power supply decoupling is one key to maximizing the performance of a Class-D amplifier. -
Page 13: Suppression Of Emi At The Source
EMI. • Each output of the CS4525 includes “snubbing” components. For example, OUT1 includes snubber components R24 (5.62 Ω) and C23 (680 pF). These components serve to damp ringing on the switch- ing outputs in the 30-50 MHz range. -
Page 14: System Connections & Jumpers
Reference Connector Name Designator Header Function When shunts are placed across column 1 and 2, the CS4525 serial audio input data is sourced by the CS8416 DSP IN To use external serial audio input data, connect the PCM source cable... -
Page 15: Crd Schematics
6. CRD SCHEMATICS Figure 6. CS4525 - Schematic Page 1... -
Page 16: Figure 7.Usb Microcontroller & Tactile Control - Schematic
Figure 7. USB Microcontroller & Tactile Control - Schematic Page 2... -
Page 17: Figure 8.Power & I/O Connections - Schematic
Figure 8. Power & I/O Connections - Schematic Page 3... -
Page 18: Crd Layout
7. CRD LAYOUT 4.5'' 2.9'' Figure 9. Component Map... -
Page 19: Figure 10.Top-Side Copper Layer
Figure 10. Top-Side Copper Layer... -
Page 20: Figure 11.Inner Copper Layer 1
Figure 11. Inner Copper Layer 1... -
Page 21: Figure 12.Inner Copper Layer 2
Figure 12. Inner Copper Layer 2... -
Page 22: Figure 13.Bottom-Side Copper Layer
Figure 13. Bottom-Side Copper Layer... -
Page 23: Performance Plots
8. PERFORMANCE PLOTS Unless otherwise stated, all measurements taken utilizing digital optical input at 1 kHz. Both channels were driven into 8 Ω resistive loads, and an AES-17 20 Hz to 20 kHz filter was enabled during testing. +2.5 +1.5 +0.5 Channel 1/2 Channel 3/4... -
Page 24: Figure 15.Thd+N Vs. Power
Channel 3/4 0.05 Channel 1/2 0.02 0.01 100m 200m 500m Figure 15. THD+N vs. Power... -
Page 25: Figure 16.Thd+N Vs. Frequency
10 W 0.05 0.02 0.01 0.005 0.002 0.001 Figure 16. THD+N vs. Frequency... -
Page 26: Figure 17.Fft At -60 Db Input
-100 -110 Channel 1/2 -120 -130 Channel 3/4 -140 Figure 17. FFT at -60 dB Input... -
Page 27: Figure 18.Fft At 0 Db Input
-100 Channel 3/4 -110 -120 -130 Channel 1/2 -140 Figure 18. FFT at 0 dB Input... -
Page 28: Figure 19.Inter-Modulation Distortion Of 19 Khz + 20 Khz
-100 Channel 3/4 -110 -120 -130 Channel 1/2 -140 Figure 19. Inter-Modulation Distortion of 19 kHz + 20 kHz... -
Page 29: Thermal De-Rating
The CRD4525-Q1 is a four-layer PCB design with 1 oz. (0.036 mm thick) copper. These parameters affect the ther- mal resistance and, since the PCB acts as a heat sink for the CS4525, the maximum sustained output power of the CRD4525-Q1. -
Page 30: Electromagnetic Compliance (Emc) Performance
Once this quasi-peak data has been recorded, it is compared against the limits of the ap- plicable EMC standard to determine if the EUT is in compliance with the standard. In the case of the CS4525, these limits are defined by the FCC Class B Part 15 and the CISPR 22 EMC standards. DS804RD4... -
Page 31: System Configuration
The source signal for EMC testing was a 1 kHz test tone generated by a battery-operated portable CD play- er. The CS4525 was driven at 1/8th of its rated power into two 8 Ω resistive loads connected to the CRD4525-Q1's output connectors through 3 meters of standard speaker wire. The CRD4525-Q1 was pow- ered by a Mean Well U65S107-P2J 18 V power supply. -
Page 32: Revision History
AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.
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