Sony CDX-GT730UI Service Manual page 40

CDX-GT730UI/GT737UI/GT780UI
Pin No. Pin Name
54 MC_TX
55 NCO
56 WAKE_UP
57 FLS_TX
58 FLS_RX
59 FLS_CLK
60 Z_MUTE
61 ILL_IN
62 NCO
63 VCC3
64 VSS1
65 NCO
66 AMP_STB
67 DIAG
68 EJECT_OK
69 SA_OUT
70 SA_CLK
71 NCO
72 TUATT
73 NCO
74 RDS_ON
75 FLASH_EN0
76 FLASH_EN1
77 USB_ON
78 DD_ON
79 BT_SEL
80 BT_MIC_DETECT
81 BUIN
82 DAVN
83 AREA_SEL2
84 AREA_SEL1
85 AREA_SEL0
86 VBUS_ON
87 USB_OVER
88 VCC3
89 VSS1
90 OSC_OUT
91 OSC_IN
92 NCO
93 BT_ACTIVE
94 NCO
95 BEEP
96 ZAPPIN_BEEP
97, 98 NCO
99 CYRIL_SEL
100 B-OUT_SEL
40
I/O
O MC-BUS communication and CD mechanism deck micon communication TX output
O Not used. (Open)
O CD mechanism deck micon wake-up signal output
I Flash writer data input
O Flash writer data output
O Flash writer clock signal output
I Z mute signal input
I Key illumination detect signal input
O Not used. (Open)
— Power supply pin (+3.3 V)
— Ground
O Not used. (Open)
O Standby signal output for power regulator IC
I Condition signal input from power amp IC
O Eject OK signal output
O Electronic volume spectrum analyzer serial data output
O Electronic volume spectrum analyzer serial clock signal output
O Not used. (Open)
O Not used. (Open)
O Not used. (Open)
O RDS IC power supply control signal output (AEP,UK,IT,RU model)
I Flash writer programming start-up signal input (Fixed at L in this set)
I Flash writer programming start-up signal input
O USB over current detect IC control signal output
O DC-DC converter power supply ON/OFF control signal output
I BT corresponding discrimination port (L: no BT)
I Not used. (Fixed at L in this set)
I Back up power supply detect signal input
I RDS data block sync detect signal input (AEP,UK,IT,RU model)
I Destination setting pin 2 (L: except RU model, H: E, MX, RU model)
I Destination setting pin 1 (L: except US, RU model, H: US, RU model)
I Destination setting pin 0 (L: US, E, EA, MX model, H: AEP, UK, IT, RU model)
I VBUS power supply control signal input (L: VBUS OFF, H: VBUS ON)
I USB over current detect signal input
— Power supply pin (+3.3 V)
— Ground
O High speed operation clock signal output (7.92 MHz)
I High speed operation clock signal input (7.92 MHz)
O Not used. (Open)
I Not used. (Fixed at L in this set)
O Not used. (Open)
O Beep signal output for power amplifi er IC
O Zappin beep signal output
O Not used. (Open)
I Cyril select signal input (L: No cyril select, H: cyril select)
I Black out setting signal input (L: No black out, H: black out)
Description