Sony STR-DH730 Service Manual page 46

STR-DH730/DH830
• IC Block Diagrams
IC2006 PCM9211PTR (DIGITAL BOARD (3/4))
32 31 30 29 28 27 26 25 24 23
RXIN2 33
RST
34
RXIN1 35
VDDRX
36
37
RXIN0
38
GNDRX
XTI
39
40
XTO
AGND
41
VCC
42
43
46
AUXIN0
RXIN0
RXIN1
RXIN2
RXIN3
RXIN4
RXIN5
RXIN6
RXIN7
RXIN8
RXIN9
MPIO_A
RXIN10
SELECTOR
RXIN11
DITOUT
ADC
Com Supply
ADC Stand alone
MPIO_C
SELECTOR
AUXIN1
OSC
SPI/I 2 C
INTERFACE
Reset
and Mode
Set
44 45
DIR
PLL
Lock:DIR
Unlock:ADC
Clock/Data
Recovery
Lock Detection
RECOUT0
RECOUT1
ADC
ADC Mode
Control
ADC Clock
(SCK/BCK/LRCK)
Divider
XMCKO
(To MPIO_A & MPO0/1)
XMCKO
Divider
REGISTER
Function
DIR CS DIR
Control f s Calculator
(48-bit) P c and P o
DIT CS
GPIO/GPO
DIR Interrupt
f s Calculator
(48-bit)
Data
POWER SUPPLY
ADC DIR DIR
ANALOG ANALOG ANALOG
46 47 48
AUTO
RXIN7
DIR
DOUT
ADC
MAIN
OUTPUT
AUXIN0
SCKO/BCK/LRCK
PORT
AUXIN1
AUXIN2
AUTO
DIR
ADC
DIT
AUXIN0
AUXIN1
AUXIN2
RECOUT0
RECOUT1
MPO0/1
SELECTOR
DITOUT
AUTO
DIR
ADC
AUXOUT
MPIO_B
AUXIN0
SELECTOR
AUXIN 2
AUXIN1
SBCK/SLRCK
Secondary BCK/LRCK
(to MPIO_A)
Divider
Selector
EXTRA DIR FUNCTIONS
DIR
ERROR DETECTION
Non-PCM DETECTION
f s Calculator
MPIO_A
All Port
Flags
MPIO_B
DTS-CD/LD Detection
Validity Flag
MPIO_C
User Data
MPO0
Channel Status Data
MPO1
BFRAME Detection
ALL
Interrupt System
22 21
SCKO
20
19
BCK
18 LRCK
17 DOUT
16
MPO1
15 MPO0
14 MPIO_B3
13 MPIO_B2
12
MPIO_B1
11
MPIO_B0
MPIO_C3
10
9
MPIO_C2
8
MPIO_C1
7 MPIO_C0
6
MPIO_A3
5
MPIO_A2
4
MPIO_A1
3
MPIO_A0
2
NPCM/INT1
1
ERROR/INT0