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UM_APIX2_ADK_TX (Rev2)
APIX2 ADK Transmitter Board (Rev2)
1.0 Introduction
The APIX2 ADK Transmitter board provides a variety of data inputs for digital video, audio and control data
processing to demonstrate all main functions of APIX2 INAP375T Transmitter devices. All board functions can
be controlled via a software GUI to an on-board microcontroller. Furthermore all functional pins of the
INAP375T device and board controls are accessible via pin headers
Features:
• Two independent HDMI/ DVI ports for digital video input (24Bit or 18 Bit width color depth)
• HSD or MX49 connector for APIX2 serial port
• USB Interface to software GUI for easy control of all board functions
• HDMI Audio input processing
• Power over APIX support
UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1
User Manual
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Figure 1-1: Tx Application Board - Block Diagram
Inova Semiconductors Confidential
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Order ID: UM_APIX2_ADK_TX
March 2015
Revision 1.2_A1
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Page 1 of 37
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Table of Contents
Related Manuals for Inova APIX2 ADK
Summary of Contents for Inova APIX2 ADK
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Page 1: Introduction
APIX2 ADK Transmitter Board (Rev2) 1.0 Introduction The APIX2 ADK Transmitter board provides a variety of data inputs for digital video, audio and control data processing to demonstrate all main functions of APIX2 INAP375T Transmitter devices. All board functions can be controlled via a software GUI to an on-board microcontroller. -
Page 2: Table Of Contents
7.0 Troubleshooting ..........................34 7.1 Possible Issues ..........................34 7.2 Reset LVDS transmitters ........................34 8.0 Ordering information ........................36 9.0 Revision History ..........................36 10.0 References ............................36 UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 2 of 37... - Page 3 Table 6-7: Pin Header PL4 ........................31 Table 6-8: Pin Header PL5 ........................32 Table 7-9: Troubleshooting ........................34 Table 10: Ordering Information ......................... 36 Table 11: Revision History ........................36 UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 3 of 37...
- Page 4 List of Figures Figure 1-1: Tx Application Board - Block Diagram ..................1 Figure 2-1: APIX2 ADK Transmitter video path ..................5 Figure 2-2: APIX2 ADK Transmitter audio path ..................5 Figure 2-3: APIX2 ADK Transmitter control path ..................6 Figure 4-1: 12 V Main Power Plug (RAPC722) ..................
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Page 5: Functional Description
2.0 Functional description 2.1 Video path The APIX2 ADK Transmitter board offers video input from two independent HDMI/DVI sources. Both HDMI/DVI inputs are converted to parallel RGB data (24 Bit color depth). The parallel RGB signals are converted to 3-lane (18Bit) or 4-lane (24Bit) LVDS video streams which are fed directly into the INAP375T transmitter device. -
Page 6: Figure 2-3: Apix2 Adk Transmitter Control Path
User Manual Figure 2-3: APIX2 ADK Transmitter control path The microcontroller offers two independent I2C busses as well as one SPI bus. The I2S busses manage EDID information and control functions of both HDMI/DVI devices as well as control functions of the audio analog to digital converter. -
Page 7: Hardware Description
3.1.3 Connectors and interfaces to expansion boards • APIX pixel interface • APIX data interface • 12V, 3.3V and 1.8V power supply • μC ports • I2C_0 and I2C_1 bus (from μC) UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 7 of 37... -
Page 8: Top Side
User Manual 3.1.4 Top Side UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 8 of 37... -
Page 9: Bottom Side
User Manual 3.1.5 Bottom Side UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 9 of 37... -
Page 10: Connector And Interface Pin Description
Table 3-2: Extension board supply APIX2 I2C, SPI slave and GPIO interface Signal Description 2,4,6,8,10 Signal ground ,12,14,16 AX_I2C_SCL APIX2 I2C master interface AX_I2C_SD Table 3-3: APIX2 I2C, SPI slave and GPIO interface UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 10 of 37... -
Page 11: Table 3-4: Extension Board Μc Interface
μC ports for extension boards UC_P0_24 UC_P1_22 UC_P0_23 UC_P1_21 UC_P0_22 DIGITAL_RESET_N Digital signal reset Signal ground I2C_0_SCL I2C bus 0 I2C_0_SDA I2C_1_SCL I2C bus 1 I2C_1_SDA Table 3-4: Extension board μC interface UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 11 of 37... -
Page 12: Table 3-5: Apix I2S Audio Interface
2.1 V Supply input (optional, if 12V DC/DC is disabled) DCDC_3V9 3.9 V Supply input (optional, if 12V DC/DC is disabled) Signal ground Signal ground Table 3-7: Power supply input for board LDOs UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 12 of 37... -
Page 13: Table 3-8: Apix Pixel Interface1 To Extension Board
APIX pixel interface to extension board Signal Description 1,4,7,13,16 Signal ground AX_PX6 AX_PX5 AX_PX11 AX_PX12 AX_PX9 APIX2 Pixel interface AX_PX10 AX_PX13 AX_PX14 AX_PX7 AX_PX8 Table 3-9: APIX pixel interface2 to extension board UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 13 of 37... -
Page 14: Table 3-10: Apix Pixel Interface3 To Extension Board
Table 3-10: APIX pixel interface3 to extension board APIX data interface to extension board Signal 1,7,10,16 AX_SPIS_CS2 AX_SPISS_RW__MII_TXD2 AX_SPIS_MB0__MII_RXD2__SBUP_D0 AX_SPIS_MB1__MII_RXDV__SBUP_D1 AX_MII_TXD3 AX_I2C_SD AX_I2C_SCL 11-14 AX_STATUS Table 3-11: APIX data interface1 to extension board UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 14 of 37... -
Page 15: Table 3-12: Apix Data Interface2 To Extension Board
AX_SPIS_CS1#__MII_TXD1__SBDW_D1 Table 3-12: APIX data interface2 to extension board Stereo audio line in Signal AD_ADC_RN_2 AD_ADC_RP_2 AD_ADC_LN_2 AD_ADC_LP_2 AD_ADC_RN_1 AD_ADC_RP_1 AD_ADC_LN_1 AD_ADC_LP_1 Table 3-13: APIX data interface2 to extension board UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 15 of 37... -
Page 16: Dip Switches And Buttons
Tx / Rx Select for μC (ON = Tx; OFF = Rx) Table 3-15: APIX2 Bootstrap * see user manual of APIX2 Tx for bootstrapping details of APIX2. UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 16 of 37... -
Page 17: Table 3-16: Μc Software Configuration
EEPROM Address - AD2 ON=1, OFF=0 EEPROM Write Protect Table 3-17: μC software configuration Push Buttons Button Status Description μC and Board Hardware Reset ON=1, OFF=0 Software Trigger Table 3-18: Push Buttons UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 17 of 37... -
Page 18: Jumpers
Pins Status Description 1 - 2 closed Power down LVDS1 or LVDS2 converter 1 - 2 open Disable Power down LVDS1 or LVDS2 converter (default) Table 3-21: μC ISP Mode UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 18 of 37... -
Page 19: Hardware Configurations
The μC does not handle the configuration of APIX2 in this case. To avoid any collision on the interface between μC and APIX2, S4.1 is required to be ON! Otherwise the board can be damaged! UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 19 of 37... -
Page 20: Led Indicators
μC alive (blink 1 sec) LED9 LED10 yellow LED11 yellow μC suspend mode is active (All APIX interface signals high impedance) LED12 yellow USB Tx LED LED13 USB Rx LED Table 4-1: LED Indicators UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 20 of 37... -
Page 21: Microcontroller - Nxp Lpc1768
Interrupt from HDMI interface P0_28 I2C_0_SCL I2C Bus 0 P0_27 I2C_0_SDA * O_0: Output (‘0’ at/after HW reset); O_1: Output (‘1’ at/after HW reset); I: Input Table 5-1: Microcontroller Port Usage UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 21 of 37... - Page 22 ISP_SELECT Enable ISP mode P0_3 UC_ISP_UART_RX ISP Interface P0_2 UC_ISP_UART_TX * O_0: Output (‘0’ at/after HW reset); O_1: Output (‘1’ at/after HW reset); I: Input Table 5-1: Microcontroller Port Usage UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 22 of 37...
- Page 23 USB_D+ UC_USBDP PC USB Interface (disabled) P1_18 USB_LED VBUS USB_VBUS * O_0: Output (‘0’ at/after HW reset); O_1: Output (‘1’ at/after HW reset); I: Input Table 5-1: Microcontroller Port Usage UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 23 of 37...
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Page 24: Extension Boards (Optional)
The two integrated PHYs are brought out to two RJ45 connectors. Each can be used to connect another eth- ernet device, whose traffic will be forwarded through the APIX link. Figure 6-1: Ethernet board Top View UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 24 of 37... -
Page 25: Table 6-2: Interconnect Between Ethernet And Master Board
Ethernet board connector Description Power supply Control signals Data lines Data lines Table 6-2: Interconnect between Ethernet and Master board Dip Switch S1 needs to be set to 00011000 ([8:1]). UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 25 of 37... -
Page 26: Board Setup
The following steps illustrate how to hook together TX master board and the Ethernet board. With the Ethernet board Inova semiconductors ships one 20pin cable, one 16 pin cable and two 20pin (white flex cables). Also included are additional bolts acting as stand and distance bolts. -
Page 27: Figure 6-4: Connect White Data Cables To Main Board
Finally place the main board on top of the Ethernet board, connect the power supply and control connectors and fix it with the 4 screws. Please be careful to avoid bending the flex cables. Figure 6-5: Complete APIX2_ADK with Ethernet board UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 27 of 37... -
Page 28: I/O Extender Board
LEDs Figure 6-6: IO Extender Top view Master board connector IO Extender board connector Description Power supply Control signals Video interface Table 6-3: Interconnection between Master and IO Extender UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 28 of 37... -
Page 29: Bottom View
Dip Switch S1 needs be configured to 1100 ([4:1]) for correct operation. 6.2.2.2 Bottom view All headers for the direct pin access are placed at the bottom of the board. UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 29 of 37... -
Page 30: Table 6-4: Pin Header Pl1
PX16 Table 6-4: Pin Header PL1 6.2.2.2.2 Pin Header PL2 Signal Signal SPI_S_CS2# I2S_DATA SPI_S_RW/MII_TXD2 I2S_BCK SPI_S_MB0/MII_RXD2/SBUP_DATA0 I2S_FRCK MII_TXD3 I2S_MCLK SPI_S_MB1/MII_RXDV/SBUP_DATA1 I2C_SCL STATUS I2C_SD Table 6-5: Pin Header PL2 UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 30 of 37... -
Page 31: Table 6-6: Pin Header Pl3
PX11 Table 6-6: Pin Header PL3 6.2.2.2.4 Pin Header PL4 Signal Signal SPI_S_SDO SPI_M_SDO/MII_CLK SPI_S_SDI SPI_M_SDI/MII_TXEN SPI_S_SCK SPI_M_SCK/MII_RXD1 SPI_S_STALL/MII_COL SPI_M_CS0#MII_RXD0 SPI_S_CS0#/MII_TXD0/SBDWN_DATA0 SPI_M_CS1#/MII_RXD3 SPI_M_CS2# SPI_S_CS1#/MII_TXD1/SBDWN_DATA1 Table 6-7: Pin Header PL4 UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 31 of 37... -
Page 32: Board Setup
Please also refer to Section 6.2.1 in case the video interface is brought to the IO Extender board (X1, X3, X5) Figure 6-7: Flex cables with connecting side up UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 32 of 37... -
Page 33: Figure 6-8: Complete Apix2_Adk With Ethernet Board
4 screws. Please be careful to avoid bending the flex cables. Figure 6-8: Complete APIX2_ADK with Ethernet board UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 33 of 37... -
Page 34: Troubleshooting
The following table assumes a transmitter and receiver device, correctly configured to transmit video over the ADK. Please refer to [1] - APICO User Manual, Inova Semiconductors GmbH or [3] - INAP375T/R Usermanual, Inova Semiconductors GmbH for further information regarding configuration. -
Page 35: Figure 7-9: Schematic Diagram For The Connections To Pwr Down Pin On Adk Inap 375T
Figure 7-9: Schematic diagram for the connections to PWR DOWN pin on ADK INAP 375T Figure 7-10: Locations of SJ1 and SJ2 jumper connections on the ADK board (bottom view) UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 35 of 37... -
Page 36: Ordering Information
User Manual 8.0 Ordering information The APIX2 ADK Transmitter board can be ordered via the order code below. Ordering Code Description APIX2_ADK_TX APIX2 ADK Transmitter Demonstration Board with HSD Connector APIX2_ADK_TX_EXT APIX2 ADK IO Extender Board APIX2_ADK_ETH APIX2 ADK Ethernet Extender Board... - Page 37 Inova Semiconductors GmbH assumes no obligation to correct any errors contained herein or to advise any user of this text of any cor- rection if such be made.
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