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Holtek BC66F5652 Manual

Rf 2.4ghz a/d flash mcu
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2.4GHz RF Transceiver A/D Flash MCU
BC66F5652
Revision: V1.10
Date: October 23, 2020

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Summary of Contents for Holtek BC66F5652

  • Page 1 2.4GHz RF Transceiver A/D Flash MCU BC66F5652 Revision: V1.10 Date: October 23, 2020...

  • Page 2: Table Of Contents

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Table of Contents Features ......................... 7 CPU Features ..........................7 Peripheral Features ........................7 RF Transceiver Features ......................8 General Description ....................8 Block Diagram ....................... 9 Pin Assignment ....................10 Pin Description ....................11 Interconnection Signal Description ....................15 Absolute Maximum Ratings ................
  • Page 3 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Flash Program Memory ..................29 Structure ............................29 Special Vectors ...........................29 Look-up Table ..........................29 Table Program Example ......................30 In Circuit Programming – ICP .....................31 On-Chip Debug Support – OCDS ....................31 In Application Programming – IAP ....................32 Data Memory .......................
  • Page 4 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Watchdog Timer Control Register ....................73 Watchdog Timer Operation ......................74 Reset and Initialisation ..................75 Reset Functions ..........................75 Reset Initial Conditions ......................79 Input/Output Ports ....................82 Pull-high Resistors ........................82 Port A Wake-up ...........................83 I/O Port Control Registers ......................84 I/O Port Source Current Control ....................84...
  • Page 5 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Comparator ....................... 141 Comparator Operation ......................141 Comparator Registers .......................141 Comparator Interrupt .........................142 Programming Considerations ....................142 Serial Interface Module – SIM ................143 SPI Interface ..........................143 C Interface ..........................150 UART Interface ....................160 UART External Pins ........................160 UART Data Transfer Scheme....................161...
  • Page 6 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Special Function Register ......................192 Bank 2 Control Register ......................205 Functional Description .......................206 State Machine ...........................208 Abbreviation ..........................216 Application Circuits ..................217 Instruction Set ....................218 Introduction ..........................218 Instruction Timing ........................218 Moving and Transferring Data ....................218 Arithmetic Operations ........................218...

  • Page 7: Features

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Features CPU Features • Operating voltage =8MHz: 1.9V~3.6V ♦ =12MHz: 2.7V~3.6V ♦ =16MHz: 3.3V~3.6V ♦ • Up to 0.25μs instruction cycle with 16MHz system clock at V =3.3V • Power down and wake-up functions to reduce power consumption •...

  • Page 8: Rf Transceiver Features

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU RF Transceiver Features • Frequency band: 2402~2480MHz • Supports 3-wire or 4-wire SPI interface • Wide input voltage range of 1.9V~3.6V • Programmable data rate: 125/250/500Kbps • Programmable TX output power up to 5dBm (Max. +6dBm) •...

  • Page 9: Block Diagram

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU clock sources gives users the ability to optimise microcontroller operation and minimise power consumption. The inclusion of flexible I/O programming features, Time-Base functions along with many other features ensure that the device will find excellent use in applications such as IoT (Smart Community), Wireless meter reading (Water/Gas Meter), Agricultural/Industrial Control in addiition to many others.

  • Page 10: Pin Assignment

    2. The OCDSDA and OCDSCK pins are supplied as dedicated OCDS pins and as such only available for the BC66V5652 device which is the OCDS EV chip for the BC66F5652 device.

  • Page 11: Pin Description

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Pin Description With the exception of the power pins and some relevant RF transceiver control pins, all pins on the device can be referenced by their Port name, e.g. PA0, PA1 etc., which refer to the digital I/O function of the pins.
  • Page 12 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Pin Name Function Description PAS1 General purpose I/O. Register enabled pull-high PAWU CMOS and wake-up PAPU PA4/PTCK/SCOM4/SSEG4/ PTCK PAS1 — PTM clock input SCOM4 PAS1 — SCOM Software controlled LCD common output SSEG4 PAS1 —...
  • Page 13 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Pin Name Function Description PBS0 CMOS General purpose I/O. Register enabled pull-high PBPU STCK PBS0 — STM clock input PB2/STCK/STP/SCOM10/ PBS0 — CMOS STM output SSEG10/AN2 SCOM10 PBS0 — SCOM Software controlled LCD common output...
  • Page 14 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Pin Name Function Description PCS0 CMOS General purpose I/O. Register enabled pull-high PCPU PCS0 — CMOS SPI serial data output PC2/SDO/SCOM17/SSEG17 SCOM17 PCS0 — SCOM Software controlled LCD common output SSEG17 PCS0 —...

  • Page 15: Interconnection Signal Description

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Interconnection Signal Description Several signals listed in the following table are not connected to external package pins. These signals are interconnection lines between the MCU and the RF transceiver. Users should properly configure the relevant I/O control to implement correct interconnection.

  • Page 16: D.c. Characteristics

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU D.C. Characteristics For data in the following tables, note that factors such as oscillator type, operating voltage, operating frequency, pin load conditions, temperature and program instruction type, etc., can all exert an influence on the measured values.

  • Page 17: Standby Current Characteristics

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Standby Current Characteristics Ta=25°C, unless otherwise specified. Test Conditions Max. Symbol Operation Mode Min. Typ. Max. Unit @85°C Conditions WDT off — μA SLEEP Mode WDT on — μA IDLE0 Mode – LIRC —...

  • Page 18: External High Speed Crystal/Ceramic Oscillator - Hxt

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU 3. The minimum and maximum tolerance values provided in the table are for the frequency at which the writer trims the HIRC oscillator. After trimming at this chosen specific frequency any change in HIRC oscillator frequency using the oscillator register control bits by the application program will give a frequency tolerance to within ±20%.

  • Page 19: System Start Up Time Characteristics

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU System Start Up Time Characteristics Ta=-40°C~85°C Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions — f /64, f — — — f /64, f — — System Start-up Time HIRC HIRC Wake-up from Condition where f is off —...

  • Page 20: Input/Output Characteristics

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Input/Output Characteristics Ta=-40°C~85°C Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions Input Low Voltage for I/O Ports — — — 0.2V Input High Voltage for I/O Ports — — 0.8V — Sink Current for I/O Ports 3V V =0.1V...

  • Page 21: A/D Converter Electrical Characteristics

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions ROM Data Retention Time — Ta=25°C — — Year RETD RAM Data Memory RAM Data Retention Voltage — Device in SLEEP Mode — —...

  • Page 22: Lvd/Lvr Electrical Characteristics

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU LVD/LVR Electrical Characteristics Ta=-40°C~85°C Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions LVR enable, voltage select 1.7V LVR enable, voltage select 1.9V Low Voltage Reset Voltage — LVR enable, voltage select 2.55V -3% 2.55 +3% LVR enable, voltage select 3.15V -3% 3.15 +3%...

  • Page 23: Comparator Electrical Characteristics

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Comparator Electrical Characteristics Ta=25°C Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions Additional Current for Comparator Enable — — — μA Power Down Current 3V Comparator disable — — μA CSTB Common Mode Voltage Range —...

  • Page 24: Rf Transceiver Characteristics

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU RF Transceiver Characteristics D.C. Characteristics Ta=25°C, V =3.3V, f =16MHz, GFSK modulation with matching circuit and low/high pass filter, XTAL RF output is powered by V (3.3V), unless otherwise specified. Symbol Parameter Test Conditions Min.

  • Page 25: Power-On Reset Characteristics

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Symbol Parameter Test Conditions Min. Typ. Max. Unit RSSI Range AGC on -110 — LO Characteristics RF Frequency Coverage Range — 2380 — 2520 @ 100kHz offset — — dBc/ Phase Noise @ 1MHz offset —...

  • Page 26: System Architecture

    2.4GHz RF Transceiver A/D Flash MCU System Architecture A key factor in the high-performance features of the Holtek range of microcontrollers is attributed to their internal system architecture. The device takes advantage of the usual features found within RISC microcontrollers providing increased speed of operation and enhanced performance. The...

  • Page 27: Program Counter

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Fetch Inst. 1 Execute Inst. 1 MOV A,[12H] Fetch Inst. 2 Execute Inst. 2 CALL DELAY Fetch Inst. 3 Flush Pipeline CPL [12H] Fetch Inst. 6 Execute Inst. 6 Fetch Inst. 7 6 DELAY: NOP...

  • Page 28: Arithmetic And Logic Unit - Alu

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Program Counter Top of Stack Stack Level 1 Stack Level 2 Stack Stack Level 3 Pointer Program Memory Bottom of Stack Stack Level 8 Arithmetic and Logic Unit – ALU The arithmetic-logic unit or ALU is a critical area of the microcontroller that carries out arithmetic and logic operations of the instruction set.

  • Page 29: Flash Program Memory

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Flash Program Memory The Program Memory is the location where the user code or program is stored. For this device the Program Memory is Flash type, which means it can be programmed and re-programmed a large number of times, allowing the user the convenience of code modification on the same device.
  • Page 30 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Program Memory Last Page or TBHP Register Data 16 bits TBLP Register User Selected Register TBLH Register High Byte Low Byte Table Program Example The following example shows how the table pointer and table data is defined and retrieved from the microcontroller.

  • Page 31: In Circuit Programming - Icp

    There is an EV chip named BC66V5652 which is used to emulate the real MCU device named BC66F5652. The EV chip device also provides an “On-Chip Debug” function to debug the real MCU device during the development process. The EV chip and the real MCU device are almost functionally compatible except for “On-Chip Debug”...

  • Page 32: In Application Programming - Iap

    Program Writer or PC. In addition, the IAP interface can also be any type of communication protocol, such as UART, using I/O pins. Regarding the internal firmware, the user can select versions provided by Holtek or create their own. The following section illustrates the procedures regarding how to implement the IAP firmware.
  • Page 33 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Page FARH FARL[7:5] FARL[4:0] 0000 0000 0000 0000 0000 0000 0000 0000 Tag Address 0000 0000 0001 1111 0001 1111 Page Number and Address Selection Write page data to FD0L/FD0H Read data word to FD0H/FD0L...
  • Page 34 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU IAP Flash Program Memory Registers There are two address registers, four 16-bit data registers and three control registers. All the registers are located in Sector 0. Read and Write operations to the Flash memory are carried out by 16-bit data operations using the address and data registers and the control register.
  • Page 35 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • FD0H Register Name Bit 7~0 D15~D8: The first Flash Memory data bit 15 ~ bit 8 Note that when 8-bit data is written into the high byte data register FD0H, the whole...
  • Page 36 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • FD3H Register Name Bit 7~0 D15~D8: The fourth Flash Memory data bit 15 ~ bit 8 • FC0 Register Name CFWEN FMOD2 FMOD1 FMOD0 FWPEN FRDEN Bit 7 CFWEN: Flash Memory Erase/Write function enable control...
  • Page 37 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU memory read operations are carried out. Clearing this bit to zero will inhibit Flash memory read operations. Bit 0 FRD: Flash Memory read control bit 0: Do not initiate Flash Memory read or indicating that a Flash Memory read process...
  • Page 38 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU the erase page, then write dummy data into the FD0H register to tag address. The current address will be internally incremented by one after each dummy data is written into the FD0H register.
  • Page 39 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Flash Memory Erase/Write Function Enable Procedure The Flash Memory Erase/Write Function Enable Mode is specially designed to prevent the flash memory contents from being wrongly modified. In order to allow users to change the Flash memory data using the IAP control registers, users must first enable the Flash memory Erase/Write function.
  • Page 40 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Flash Memory Erase/Write Function Enable Procedure FMOD[2:0]=110 Set FWPEN=1 Hardware start a timer Wrtie the following pattern to Flash Data register FD1L=00h, FD1H=04h FD2L=0Dh, FD2H=09h FD3L=C3h, FD3H=40h Is timer Time-out FWPEN=0? Is pattern correct?
  • Page 41 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Flash Memory Write Procedure After the Flash memory erase/write function has been successfully enabled as the CFWEN bit is set high, the data to be written into the flash memory can be loaded into the write buffer. The selected flash memory page data should be erased by properly configuring the IAP control registers before the data write procedure is executed.
  • Page 42 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Write Flash Memory Flash Memory Erase/Write Function Enable Procedure Page Erase FMOD[2:0]=001 Set CLWB Bit Set Erase Page Address FARH=xxH, FARL=xxH Write dummy data into FD0H (Tag Address) Tag address Finish ? FWT=1...
  • Page 43 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Flash Memory Non-Consecutive Write Description The main difference between Flash Memory Consecutive and Non-Consecutive Write operations is whether the data words to be written are located in consecutive addresses or not. If the data to be written is not located in consecutive addresses the desired address should be re-assigned after a data word is successfully written into the Flash Memory.
  • Page 44 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Write Flash Memory Flash Memory Erase/Write Function Enable Procedure Page Erase FMOD[2:0]=001 Set CLWB Bit Set Erase Page Address FARH =xxH, FARL=xxH Write dummy data into FD0H (Tag Address) Tag address Finish ?
  • Page 45 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Important Points to Note for Flash Memory Write Operations 1. The “Flash Memory Erase/Write Function Enable Procedure” must be successfully activated before the Flash Memory erase/write operation is executed. 2. The Flash Memory erase operation is executed to erase a whole page.

  • Page 46: Data Memory

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Data Memory The Data Memory is a volatile area of 8-bit wide RAM internal memory and is the location where temporary information is stored. Categorised into two types, the first of these is an area of RAM, known as the Special Function Data Memory.

  • Page 47: Data Memory Addressing

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Data Memory Addressing For the device that supports the extended instructions, there is no Bank Pointer for Data Memory addressing. The desired Sector is pointed by the MP1H or MP2H register and the certain Data Memory address in the selected sector is specified by the MP1L or MP2L register when using indirect addressing access.
  • Page 48 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Sector 0 Sector 1 Sector 0 Sector 1 IAR0 IAR1 PCPU MP1L LXTC MP1H SIMC0 SIMC1 TBLP SIMD TBLH SIMC2/SIMA TBHP SIMTOC STATUS VBGRC TB1C IAR2 MFI0 MP2L MFI1 MP2H MFI2 RSTFC SLEDC0...

  • Page 49: Special Function Register Description

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Special Function Register Description Most of the Special Function Register details will be described in the relevant functional section, however several registers require a separate description in this section. Indirect Addressing Registers – IAR0, IAR1, IAR2 The Indirect Addressing Registers, IAR0, IAR1 and IAR2, although having their locations in normal RAM register space, do not actually physically exist as normal registers.

  • Page 50: Accumulator - Acc

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Example 2 data .section ´data´ adres1 db ? adres2 db ? adres3 db ? adres4 db ? block db ? code .section at 0 ´code´ org 00h start: mov a, 04h ; setup size of block...

  • Page 51: Program Counter Low Register - Pcl

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Program Counter Low Register – PCL To provide additional program control functions, the low byte of the Program Counter is made accessible to programmers by locating it within the Special Purpose area of the Data Memory. By manipulating this register, direct jumps to other program locations are easily implemented.
  • Page 52 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • STATUS Register Name “x”: unknown SC: The result of the “XOR” operation which is performed by the OV flag and the Bit 7 MSB of the instruction operation result Bit 6 CZ: The operational result of different flags for different instructions For SUB/SUBM/LSUB/LSUBM instructions, the CZ flag is equal to the Z flag.

  • Page 53: Eeprom Data Memory

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU EEPROM Data Memory This device contains an area of internal EEPROM Data Memory. EEPROM is by its nature a non- volatile form of re-programmable memory, with data retention even when its power supply is removed.
  • Page 54 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • EEC Register Name EWERTS EREN MODE WREN RDEN Bit 7 EWERTS: EEPROM Erase time and Write time selection 0: Erase time is 3.2ms (t ) / Write time is 2.2ms (t EEER EEWR 1: Erase time is 3.7ms (t...

  • Page 55: Read Operation From The Eeprom

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU hardware after the read cycle has finished. Setting this bit high will have no effect if the RDEN has not first been set high. Note: 1. The EREN, ER, WREN, WR, RDEN and RD cannot be set high at the same time in one instruction.

  • Page 56: Write Operation To The Eeprom

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU page erase mode. The EEPROM address higher 3 bits used to specify the desired page location will not be incremented. When the EEPROM address, internally generated, reaches the page boundary, namely 0FH, the EEPROM address will stop at 0FH. The EEPROM address will not “roll over”.
  • Page 57 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU The internal page buffer will be cleared by hardware after power on reset. When the EEPROM write enable control bit, namely WREN, is changed from “1” to “0”, the internal page buffer will also be cleared.
  • Page 58 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Programming Considerations Care must be taken that data is not inadvertently written to the EEPROM. Protection can be enhanced by ensuring that the Write Enable bit is normally cleared to zero when not writing. Also the Memory Pointer high byte register, MP1H or MP2H, could be normally cleared to zero as this would inhibit access to Sector 1 where the EEPROM control register exists.
  • Page 59 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU MOV READ_DATA, A PAGE_READ_FINISH: CLR IAR1 ; disable EEPROM read function CLR MP1H Erasing a Data Page to the EEPROM − polling method MOV A, 040H ; setup memory pointer low byte MP1L MOV MP1L, A ; MP1L points to EEC register MOV A, 01H ; setup memory pointer high byte MP1H MOV MP1H, A SET IAR1.4 ; set MODE bit, select page operation mode SET IAR1.4 ; set MODE bit, select page operation mode...
  • Page 60 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Writing a Data Page to the EEPROM - polling method MOV A, 040H ; setup memory pointer low byte MP1L MOV MP1L, A ; MP1 points to EEC register MOV A, 01H ; setup memory pointer high byte MP1H MOV MP1H, A SET IAR1.4 ; set MODE bit, select page operation mode MOV A, EEPROM_ADRES ; user defined address MOV EEA, A ; ~~~~ The data length can be up to 16 bytes (Start) ~~~~ CALL WRITE_BUF CALL WRITE_BUF JMP WRITE_START ; ~~~~ The data length can be up to 16 bytes (End) ~~~~...

  • Page 61: Oscillators

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Oscillators Various oscillator options offer the user a wide range of functions according to their various application requirements. The flexible features of the oscillator functions ensure that the best optimisation can be achieved in terms of speed and power saving. Oscillator selections and operation are selected through a combination of configuration option and relevant control registers.

  • Page 62: External Crystal/Ceramic Oscillator - Hxt

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU High Speed Oscillators HIRCEN HIRC IDLE0 Prescaler HXTEN SLEEP Low Speed Oscillators LXTEN CKS2~CKS0 IDLE2 LIRC SLEEP LIRC LIRC LIRC System Clock Configurations External Crystal/Ceramic Oscillator – HXT The External Crystal/Ceramic System Oscillator is one of the high frequency oscillator choices, which is selected via a software control bit, FHS.

  • Page 63: Internal High Speed Internal Rc Oscillator - Hirc

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Internal High Speed Internal RC Oscillator – HIRC The internal RC oscillator is one of the high frequency oscillator choices, which is selected via a software control bit, FHS. It is a fully integrated system oscillator requiring no external components.

  • Page 64: Internal 32Khz Oscillator - Lirc

    As Holtek has provided the device with both high and low speed clock sources and the means to switch between them dynamically, the user can optimise the operation of their microcontroller to achieve the best performance/power ratio.

  • Page 65: System Operation Modes

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU High Speed Oscillators HIRCEN HIRC IDLE0 Prescaler HXTEN SLEEP Low Speed Oscillators LXTEN CKS2~CKS0 IDLE2 SLEEP LIRC PSC0 Prescaler0 Time Base 0 TB0[2:0] LIRC CLKSEL0[1:0] LIRC PSC1 Time Base 1 Prescaler1 TB1[2:0] CLKSEL1[1:0]...

  • Page 66: Control Registers

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU FAST Mode This is one of the main operating modes where the microcontroller has all of its functions operational and where the system clock is provided by one of the high speed oscillators. This mode...
  • Page 67 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • SCC Register Name CKS2 CKS1 CKS0 — FHIDEN FSIDEN — — Bit 7~5 CKS2~CKS0: System clock selection 000: f 001: f 010: f 011: f 100: f 101: f 110: f 111: f These three bits are used to select which clock is used as the system clock source.
  • Page 68 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 1 HIRCF: HIRC oscillator stable flag 0: HIRC unstable 1: HIRC stable This bit is used to indicate whether the HIRC oscillator is stable or not. When the HIRCEN bit is set high to enable the HIRC oscillator or the HIRC frequency selection is changed by application program, the HIRCF bit will first be cleared to zero and then set high after the HIRC oscillator is stable.

  • Page 69: Operating Mode Switching

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Operating Mode Switching The device can switch between operating modes dynamically allowing the user to select the best performance/power ratio for the present task in hand. In this way microcontroller operations that do not require high performance can be executed using slower clocks thus requiring less operating current and prolonging battery life in portable applications.
  • Page 70 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU FAST Mode CKS2~CKS0=111 SLOW Mode FHIDEN=0, FSIDEN=0 HALT instruction is executed SLEEP Mode FHIDEN=0, FSIDEN=1 HALT instruction is executed IDLE0 Mode FHIDEN=1, FSIDEN=1 HALT instruction is executed IDLE1 Mode FHIDEN=1, FSIDEN=0 HALT instruction is executed...
  • Page 71 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Entering the SLEEP Mode There is only one way for the device to enter the SLEEP Mode and that is to execute the “HALT” instruction in the application program with both the FHIDEN and FSIDEN bits in the SCC register equal to “0”.

  • Page 72: Standby Current Considerations

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • The f clock will be on but the f clock will be off and the application program will stop at the “HALT” instruction. • The Data Memory contents and registers will maintain their present condition.

  • Page 73: Programming Considerations

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU possible situations may occur. The first is where the related interrupt is disabled or the interrupt is enabled but the stack is full, in which case the program will resume execution at the instruction following the “HALT”...

  • Page 74: Watchdog Timer Operation

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 2~0 WS2~WS0: WDT time-out period selection 000: 2 LIRC 001: 2 LIRC 010: 2 LIRC 011: 2 LIRC 100: 2 LIRC 101: 2 LIRC 110: 2 LIRC 111: 2 LIRC These three bits determine the division ratio of the Watchdog Timer source clock, which in turn determines the timeout period.

  • Page 75: Reset And Initialisation

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU time-out occurs, the TO bit in the status register will be set and only the Program Counter and Stack Pointer will be reset. Three methods can be adopted to clear the contents of the Watchdog Timer.
  • Page 76 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Power-on Reset RSTD SST Time-out Power-On Reset Timing Chart Internal Reset Control There is an internal reset control register, RSTC, which is used to provide a reset when the device operates abnormally due to the environmental noise interference. If the content of the RSTC register is set to any value other than 01010101B or 10101010B, it will reset the device after a delay time, .
  • Page 77 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 0 WRF: WDT control register software reset flag Refer to the Watchdog Timer Control Register section. Low Voltage Reset – LVR The microcontroller contains a low voltage reset circuit in order to monitor the supply voltage of the device and provides an MCU reset should the value fall below a certain predefined level.
  • Page 78 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • RSTFC Register Name — — — — RSTF LVRF — — — — — — — — “x”: unknown Bit 7~4 Unimplemented, read as “0” RSTF: Reset control register software reset flag Bit 3 Refer to the Internal Reset Control section.

  • Page 79: Reset Initial Conditions

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Reset Initial Conditions The different types of reset described affect the reset flags in different ways. These flags, known as PDF and TO are located in the status register and are controlled by various microcontroller operations, such as the SLEEP or IDLE Mode function or Watchdog Timer.
  • Page 80 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Register Reset WDT Time-out WDT Time-out LVR Reset Name (Power On) (Normal Operation) (IDLE/SLEEP) PAWU 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0...
  • Page 81 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Register Reset WDT Time-out WDT Time-out LVR Reset Name (Power On) (Normal Operation) (IDLE/SLEEP) - 1 1 1 1 1 1 1 - 1 1 1 1 1 1 1 - 1 1 1 1 1 1 1...

  • Page 82: Input/Output Ports

    “-” stands for unimplemented Input/Output Ports Holtek microcontrollers offer considerable flexibility on their I/O ports. With the input or output designation of every pin fully under user program control, pull-high selections for all ports and wake-up selections on certain pins, the user is provided with an I/O structure to meet the needs of a wide range of application possibilities.

  • Page 83: Port A Wake-Up

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU to determine whether the pull-high function is enabled or not while the LVPUC register is used to select the pull-high resistors value for low voltage power supply applications. Note that the pull-high resistor can be controlled by the relevant pull-high control register only when the pin-shared functional pin is selected as an digital input or NMOS output.

  • Page 84: I/O Port Control Registers

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • PAWU Register Name PAWU7 PAWU6 PAWU5 PAWU4 PAWU3 PAWU2 PAWU1 PAWU0 Bit 7~0 PAWU7~PAWU0: PA7~PA0 wake-up function control 0: Disable 1: Enable I/O Port Control Registers Each I/O port has its own control register known as PAC~PDC, to control the input/output configuration.

  • Page 85: Pin-Shared Functions

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • SLEDC0 Register Name SLEDC07 SLEDC06 SLEDC05 SLEDC04 SLEDC03 SLEDC02 SLEDC01 SLEDC00 Bit 7~6 SLEDC07~SLEDC06: PB6~PB4 Source Current Selection 00: Source current = Level 0 (Min.) 01: Source current = Level 1 10: Source current = Level 2 11: Source current = Level 3 (Max.)
  • Page 86 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Pin-shared Function Selection Registers The limited number of supplied pins in a package can impose restrictions on the amount of functions a certain device can contain. However by allowing the same pins to share several different functions and providing a means of function selection, a wide range of different functions can be incorporated into even relatively small package sizes.
  • Page 87 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU The IRQ pin is the RF transceiver interrupt request output, which is pin-shared with PA1, for the PA1 pin function to be used, it is recommended to avoid using the RF transceiver by disconnecting the RF power supply.
  • Page 88 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 3~2 PBS03~PBS02: PB1 Pin-Shared Function Selection 00: PB1/INT1 01: SCOM9/SSEG9 10: AN1 11: XT2 Bit 1~0 PBS01~PBS00: PB0 Pin-Shared Function Selection 00: PB0/INT0 01: SCOM8/SSEG8 10: AN0 11: XT1 • PBS1 Register Name —...
  • Page 89 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • PDS0 Register Name PDS07 PDS06 PDS05 PDS04 PDS03 PDS02 PDS01 PDS00 Bit 7~6 PDS07~PDS06: PD3 Pin-Shared Function Selection 00: PD3 01: CTP 10: SSEG25 11: AN9 Bit 5~4 PDS05~PDS04: PD2 Pin-Shared Function Selection...

  • Page 90: I/O Pin Structures

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 0 RXPS: RX input source pin selection 0: PD1 1: PC1 I/O Pin Structures The accompanying diagram illustrates the internal structure of the I/O logic function. As the exact logical construction of the I/O pin will differ from this drawing, it is supplied as a guide only to assist with the functional understanding of the I/O logic function.

  • Page 91: Timer Modules - Tm

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Timer Modules – TM One of the most fundamental functions in any microcontroller device is the ability to control and measure time. To implement time related functions the device includes a Timer Modules, abbreviated to the name TM.

  • Page 92: Tm Interrupts

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU TM Interrupts The Compact Type, Standard Type and Periodic Type TMs each have two internal interrupts, one for each of the internal comparator A or comparator P, which generate a TM interrupt when a compare match condition occurs.

  • Page 93: Programming Considerations

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Clock input STCK CCR capture input STPI CCR output STM Function Pin Block Diagram Clock or Capture input PTCK Capture input PTPI CCR output PTM Function Pin Block Diagram Programming Considerations The TM Counter Registers and the Capture/Compare CCRA and CCRP registers, all have a low and high byte structure.

  • Page 94: Compact Type Tm - Ctm

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU – Note that here data is only written to the 8-bit buffer. Step 2. Write data to High Byte xTMAH or PTMRPH ♦ – Here data is written directly to the high byte registers and simultaneously data is latched from the 8-bit buffer to the Low Byte registers.

  • Page 95: Compact Type Tm Register Description

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Compact Type TM Register Description Overall operation of the Compact TM is controlled using a series of registers. A read only register pair exists to store the internal counter 16-bit value, while a read/write register pair exists to store the internal 16-bit CCRA value.
  • Page 96 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU the Compare Match Output Mode or the PWM Output Mode then the CTM output pin will be reset to its initial condition, as specified by the CTOC bit, when the CTON bit changes from low to high.
  • Page 97 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU This is the output control bit for the CTM output pin. Its operation depends upon whether CTM is being used in the Compare Match Output Mode or in the PWM Output Mode. It has no effect if the CTM is in the Timer/Counter Mode. In the Compare Match Output Mode it determines the logic level of the CTM output pin before a compare match occurs.

  • Page 98: Compact Type Tm Operating Modes

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • CTMAH Register Name Bit 7~0 D15~D8: CTM CCRA High Byte Register bit 7 ~ bit 0 CTM 16-bit CCRA bit 15 ~ bit 8 • CTMRP Register Name Bit 7~0 D7~D0: CTM CCRP 8-bit register, compared with the CTM Counter bit 15 ~ bit 8...
  • Page 99 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU output pin. The way in which the CTM output pin changes state are determined by the condition of the CTIO1 and CTIO0 bits in the CTMC1 register. The CTM output pin can be selected using the CTIO1 and CTIO0 bits to go high, to go low or to toggle from its present condition when a compare match occurs from Comparator A.
  • Page 100 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value CTCCLR = 1; CTM [1:0] = 00 CCRA = 0 CCRA > 0 Counter cleared by CCRA value Counter overflow 0xFFFF CCRA=0 Resume CCRA Pause Stop Counter Restart CCRP Time CTON...
  • Page 101 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Timer/Counter Mode To select this mode, bits CTM1 and CTM0 in the CTMC1 register should be set to “11” respectively. The Timer/Counter Mode operates in an identical way to the Compare Match Output Mode generating the same interrupt flags.
  • Page 102 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value CTDPX = 0; CTM [1:0] = 10 Counter cleared by CCRP Counter Reset when CTON returns high CCRP Counter Stop if Pause Resume CTON bit low CCRA Time CTON CTPAU CTPOL CCRA Int.
  • Page 103 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value CTDPX = 1; CTM [1:0] = 10 Counter cleared by CCRA Counter Reset when CTON returns high CCRA Counter Stop if Pause Resume CTON bit low CCRP Time CTON CTPAU CTPOL CCRP Int.

  • Page 104: Standard Type Tm - Stm

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Standard Type TM – STM The Standard Type TM contains five operating modes, which are Compare Match Output, Timer/ Event Counter, Capture Input, Single Pulse Output and PWM Output modes. The Standard TM can also be controlled with two external input pins and can drive one external output pin.
  • Page 105 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Register Name STMC0 STPAU STCK2 STCK1 STCK0 STON — — — STMC1 STM1 STM0 STIO1 STIO0 STOC STPOL STDPX STCCLR STMDL STMDH STMAL STMAH STMRP STRP7 STRP6 STRP5 STRP4 STRP3 STRP2 STRP1 STRP0 16-bit Standard TM Register List •...
  • Page 106 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • STMC1 Register Name STM1 STM0 STIO1 STIO0 STOC STPOL STDPX STCCLR Bit 7~6 STM1~STM0: STM operating mode selection 00: Compare Match Output Mode 01: Capture Input Mode 10: PWM Output Mode or Single Pulse Output Mode 11: Timer/Counter Mode These bits setup the required operating mode for the STM.
  • Page 107 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU PWM Output Mode/Single Pulse Output Mode 0: Active low 1: Active high This is the output control bit for the STM output pin. Its operation depends upon whether STM is being used in the Compare Match Output Mode or in the PWM Output Mode/Single Pulse Output Mode.

  • Page 108: Standard Type Tm Operation Modes

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • STMAL Register Name Bit 7~0 D7~D0: STM CCRA Low Byte Register bit 7 ~ bit 0 STM 16-bit CCRA bit 7 ~ bit 0 • STMAH Register Name Bit 7~0 D15~D8: STM CCRA High Byte Register bit 7 ~ bit 0 STM 16-bit CCRA bit 15 ~ bit 8 •...
  • Page 109 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU generated even if the value of the CCRP bits is less than that of the CCRA registers. Therefore when STCCLR is high no STMPF interrupt request flag will be generated. In the Compare Match Output Mode, the CCRA can not be set to “0”.
  • Page 110 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value STCCLR = 1; STM [1:0] = 00 CCRA = 0 CCRA > 0 Counter cleared by CCRA value Counter overflow 0xFFFF CCRA=0 Resume CCRA Pause Stop Counter Restart CCRP Time STON...
  • Page 111 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Timer/Counter Mode To select this mode, bits STM1 and STM0 in the STMC1 register should be set to “11” respectively. The Timer/Counter Mode operates in an identical way to the Compare Match Output Mode generating the same interrupt flags.
  • Page 112 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value STDPX = 0; STM [1:0] = 10 Counter cleared by CCRP Counter Reset when STON returns high CCRP Counter Stop if Pause Resume STON bit low CCRA Time STON STPAU STPOL CCRA Int.
  • Page 113 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value STDPX = 1; STM [1:0] = 10 Counter cleared by CCRA Counter Reset when STON returns high CCRA Counter Stop if Pause Resume STON bit low CCRP Time STON STPAU STPOL CCRP Int.
  • Page 114 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Single Pulse Output Mode To select this mode, bits STM1 and STM0 in the STMC1 register should be set to “10” respectively and also the STIO1 and STIO0 bits should be set to “11” respectively. The Single Pulse Output Mode, as the name suggests, will generate a single shot pulse on the STM output pin.
  • Page 115 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value STM [1:0] = 10 ; STIO [1:0] = 11 Counter stopped by CCRA Counter Reset when STON returns high CCRA Counter Stops by Resume Pause software CCRP Time STON Auto. set by...
  • Page 116 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Capture Input Mode To select this mode bits STM1 and STM0 in the STMC1 register should be set to “01” respectively. This mode enables external signals to capture and store the present value of the internal counter and can therefore be used for applications such as pulse width measurements.
  • Page 117 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value STM [1:0] = 01 Counter cleared by CCRP Counter Counter Stop Reset CCRP Resume Pause Time STON STPAU Active Active Active edge edge edge STM capture pin STPI CCRA Int. Flag STMAF CCRP Int.

  • Page 118: Periodic Type Tm - Ptm

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Periodic Type TM – PTM The Periodic Type TM contains five operating modes, which are Compare Match Output, Timer/ Event Counter, Capture Input, Single Pulse Output and PWM Output modes. The Periodic TM can also be controlled with two external input pins and can drive one external output pin.
  • Page 119 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Register Name PTMC0 PTPAU PTCK2 PTCK1 PTCK0 PTON — — — PTMC1 PTM1 PTM0 PTIO1 PTIO0 PTOC PTPOL PTCAPTS PTCCLR PTMDL PTMDH — — — — — — PTMAL PTMAH — — —...
  • Page 120 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • PTMC1 Register Name PTM1 PTM0 PTIO1 PTIO0 PTOC PTPOL PTCAPTS PTCCLR Bit 7~6 PTM1~PTM0: PTM operating mode selection 00: Compare Match Output Mode 01: Capture Input Mode 10: PWM Output Mode or Single Pulse Output Mode 11: Timer/Counter Mode These bits setup the required operating mode for the PTM.
  • Page 121 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU PWM Output Mode/Single Pulse Output Mode 0: Active low 1: Active high This is the output control bit for the PTM output pin. Its operation depends upon whether PTM is being used in the Compare Match Output Mode or in the PWM Output Mode/Single Pulse Output Mode.

  • Page 122: Periodic Type Tm Operation Modes

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • PTMAL Register Name Bit 7~0 D7~D0: PTM CCRA Low Byte Register bit 7 ~ bit 0 PTM 10-bit CCRA bit 7 ~ bit 0 • PTMAH Register Name — — — —...
  • Page 123 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU match occurs from Comparator A. However, here only the PTMAF interrupt request flag will be generated even if the value of the CCRP bits is less than that of the CCRA registers. Therefore when PTCCLR is high no PTMPF interrupt request flag will be generated.
  • Page 124 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value PTCCLR = 1; PTM [1:0] = 00 CCRA = 0 CCRA > 0 Counter cleared by CCRA value Counter overflow 0x3FF CCRA=0 Resume CCRA Pause Stop Counter Restart CCRP Time PTON...
  • Page 125 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Timer/Counter Mode To select this mode, bits PTM1 and PTM0 in the PTMC1 register should be set to “11” respectively. The Timer/Counter Mode operates in an identical way to the Compare Match Output Mode generating the same interrupt flags.
  • Page 126 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value PTM [1:0] = 10 Counter cleared by CCRP Counter Reset when PTON returns high CCRP Counter Stop if Pause Resume PTON bit low CCRA Time PTON PTPAU PTPOL CCRA Int. Flag PTMAF CCRP Int.
  • Page 127 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Single Pulse Output Mode To select this mode, bits PTM1 and PTM0 in the PTMC1 register should be set to “10” respectively and also the PTIO1 and PTIO0 bits should be set to “11” respectively. The Single Pulse Output Mode, as the name suggests, will generate a single shot pulse on the PTM output pin.
  • Page 128 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value PTM [1:0] = 10; PTIO [1:0] = 11 Counter stopped by CCRA Counter Reset when PTON returns high CCRA Counter Stops by Resume Pause software CCRP Time PTON Auto. set by...
  • Page 129 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Capture Input Mode To select this mode bits PTM1 and PTM0 in the PTMC1 register should be set to “01” respectively. This mode enables external signals to capture and store the present value of the internal counter and can therefore be used for applications such as pulse width measurements.
  • Page 130 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Counter Value PTM [1:0] = 01 Counter cleared by CCRP Counter Counter Stop Reset CCRP Resume Pause Time PTON PTPAU Active Active Active edge edge edge PTM Capture pin PTPI or PTCK CCRA Int.

  • Page 131: Analog To Digital Converter

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Analog to Digital Converter The need to interface to real world analog signals is a common requirement for many electronic systems. However, to properly process these signals by a microcontroller, they must first be converted into digital signals by A/D converters.

  • Page 132: A/D Converter Register Description

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU A/D Converter Register Description Overall operation of the A/D converter is controlled using a series of registers. A read only register pair exists to store the A/D converter data 12-bit value. Three registers, SADC0, SADC1 and SADC2, are the control registers which setup the operating conditions and control function of the A/D converter.
  • Page 133 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU The relevant pin-shared function selection bits determine which pins on I/O ports are used as analog inputs for the A/D converter input and which pins are not to be used as the A/D converter input.
  • Page 134 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • SADC1 Register Name SAINS3 SAINS2 SAINS1 SAINS0 — SACKS2 SACKS1 SACKS0 — — Bit 7~4 SAINS3~SAINS0: A/D converter input signal selection 0000: External signal – External analog channel input, ANn 0001: Internal signal – Internal A/D converter power supply voltage AV 0010: Internal signal –...

  • Page 135: A/D Converter Reference Voltage

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 3~2 SAVRS1~SAVRS0: A/D converter reference voltage selection 00: Internal A/D converter power, AV 01: External VREF pin 1x: Internal PGA output voltage, V These bits are used to select the A/D converter reference voltage source. When the internal reference voltage source is selected, the reference voltage derived from the external VREF pin will automatically be switched off.

  • Page 136: A/D Converter Input Signals

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU A/D Converter Input Signals All of the external A/D analog input pins are pin-shared with the I/O pins as well as other functions. The corresponding pin-shared function selection bits in the PxS1 and PxS0 registers, determine whether the external input pins are set as A/D converter analog channel inputs or whether they have other functions.

  • Page 137: A/D Conversion Rate And Timing Diagram

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU The clock source for the A/D converter, which originates from the system clock f , can be chosen to be either f or a subdivided version of f . The division ratio value is determined by the SACKS2~SACKS0 bits in the SADC1 register.

  • Page 138: Summary Of A/D Conversion Steps

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU ON2ST ADCEN A/D sampling time A/D sampling time START Start of A/D conversion Start of A/D conversion Start of A/D conversion ADBZ End of A/D End of A/D conversion conversion SACS[3:0] 0011B 0010B...

  • Page 139: Programming Considerations

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • Step 9 The A/D conversion procedure can now be initialised by setting the START bit from low to high and then low again. • Step 10 If A/D conversion is in progress, the ADBZ flag will be set high. After the A/D conversion process is completed, the ADBZ flag will go low and then output data can be read from the SADOH and SADOL registers.

  • Page 140: A/D Converter Programming Examples

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU A/D Converter Programming Examples The following two programming examples illustrate how to setup and implement an A/D conversion. In the first example, the method of polling the ADBZ bit in the SADC0 register is used to detect when the conversion cycle is complete, whereas in the second example, the A/D converter interrupt is used to determine when the conversion is complete.

  • Page 141: Comparator

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU mov a,SADOL ; read low byte conversion result value mov SADOL_buffer,a ; save result to user defined register mov a,SADOH ; read high byte conversion result value mov SADOH_buffer,a ; save result to user defined register EXIT_INT_ISR: mov a,status_stack mov STATUS,a ; restore STATUS from user defined memory mov a,acc_stack ; restore ACC from user defined memory reti Comparator An analog comparator is contained within the device. The comparator function offers flexibility via their register controlled features such as power-down, polarity select, hysteresis etc.

  • Page 142: Comparator Interrupt

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • CMPC Register Name — CMPEN CMPPOL CMPO — — — CMPHYEN — — — — — — — — Bit 7 Unimplemented, read as “0” Bit 6 CMPEN: Comparator Enable Control 0: Disable 1: Enable This is the Comparator on/off control bit.

  • Page 143: Serial Interface Module - Sim

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Serial Interface Module – SIM The device contains a Serial Interface Module, which includes both the four-line SPI interface or two-line I C interface types, to allow an easy method of communication with external peripheral hardware.
  • Page 144 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • LSB first or MSB first data transmission modes • Transmission complete flag • Rising or falling active clock edge The status of the SPI interface pins is determined by a number of factors such as whether the device is in the master or slave mode and upon the condition of certain control bits such as CSEN and SIMEN.
  • Page 145 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU SPI Control Registers There are also two control registers for the SPI interface, SIMC0 and SIMC2. Note that the SIMC2 register also has the name SIMA which is used by the I C function. The SIMC0 register is used to control the enable/disable function and to set the data transmission clock frequency.
  • Page 146 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • SIMC2 Register Name CKPOLB CKEG CSEN WCOL Bit 7~6 D7~D6: Undefined bits These bits can be read or written by application program. Bit 5 CKPOLB: SPI clock line base condition selection 0: The SCK line will be high when the clock is inactive...
  • Page 147 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU SPI Communication After the SPI interface is enabled by setting the SIMEN bit high, then in the Master Mode, when data is written to the SIMD register, transmission/reception will begin simultaneously. When the data transfer is complete, the TRF flag will be set automatically, but must be cleared using the application program.
  • Page 148 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU SCK (CKPOLB=1) SCK (CKPOLB=0) D7/D0 D6/D1 D5/D2 D4/D3 D3/D4 D2/D5 D1/D6 D0/D7 SDI Data Capture Write to SIMD (SDO changes as soon as writing occurs; SDO is floating if SCS=1) Note: For SPI slave mode, if SIMEN=1 and CSEN=0, SPI is always enabled and ignores the SCS level.
  • Page 149 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU SPI Bus Enable/Disable To enable the SPI bus, set CSEN=1 and SCS=0, then wait for data to be written into the SIMD (TXRX buffer) register. For the Master Mode, after data has been written to the SIMD (TXRX buffer) register, then transmission or reception will start automatically.

  • Page 150: I 2 C Interface

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Slave Mode • Step 1 Select the SPI Slave mode using the SIM2~SIM0 bits in the SIMC0 control register • Step 2 Setup the CSEN bit and setup the MLS bit to choose if the data is MSB or LSB first, this setting must be the same with the Master devices.
  • Page 151 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU C interface Operation The I C serial interface is a two line interface, a serial data line, SDA, and serial clock line, SCL. As many devices may be connected together on the same bus, their outputs are both open drain types.
  • Page 152 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU The SIMDEB1 and SIMDEB0 bits determine the debounce time of the I C interface. This uses the system clock to in effect add a debounce time to the external clock to reduce the possibility of glitches on the clock line causing erroneous operation.
  • Page 153 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU C Address Register The SIMA register is also used by the SPI interface but has the name SIMC2. The SIMA register is the location where the 7-bit slave address of the slave device is stored. Bits 7~1 of the SIMA register define the device slave address.
  • Page 154 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 1 SIMEN: SIM Enable Control 0: Disable 1: Enable The bit is the overall on/off control for the SIM interface. When the SIMEN bit is cleared to zero to disable the SIM interface, the SDI, SDO, SCK and SCS, or SDA...
  • Page 155 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 2 SRW: I C slave read/write flag 0: Slave device should be in receive mode 1: Slave device should be in transmit mode The SRW flag is the I C Slave Read/Write flag. This flag determines whether the master device wishes to transmit or receive data from the I C bus.
  • Page 156 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Start Set SIM[2:0]=110 Set SIMEN Write Slave Address to SIMA C Bus Interrupt=? CLR SIME SET SIME Poll SIMF to decide when Wait for Interrupt to go to I C Bus ISR Goto Main Program...
  • Page 157 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU C Bus Slave Address Acknowledge Signal After the master has transmitted a calling address, any slave device on the I C bus, whose own internal address matches the calling address, must generate an acknowledge signal. The acknowledge signal will inform the master that a slave device has accepted its calling address.
  • Page 158 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Start SIMTOF=1? SET SIMTOEN HAAS=1? CLR SIMTOF HTX=1? SRW=1? RETI Read from SIMD to CLR HTX SET HTX release SCL Line CLR TXAK RETI Dummy read from SIMD Write data to SIMD to...
  • Page 159 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU When an I C time-out counter overflow occurs, the counter will stop and the SIMTOEN bit will be cleared to zero and the SIMTOF bit will be set high to indicate that a time-out condition has occurred.

  • Page 160: Uart Interface

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU UART Interface The device contains an integrated full-duplex asynchronous serial communications UART interface that enables communication with external devices that contain a serial interface. The UART function has many features and can transmit and receive data serially by transferring a frame of data with eight or nine data bits per transmission as well as being able to detect errors when the data is overwritten or incorrectly framed.

  • Page 161: Uart Data Transfer Scheme

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU UART Data Transfer Scheme The above block diagram shows the overall data transfer structure arrangement for the UART. The actual data to be transmitted from the MCU is first transferred to the TXR_RXR register by the application program.
  • Page 162 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 6 NF: Noise flag 0: No noise is detected 1: Noise is detected The NF flag is the noise flag. When this read only flag is “0”, it indicates no noise condition. When the flag is “1”, it indicates that the UART has detected noise on the receiver input.
  • Page 163 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 0 TXIF: Transmit TXR_RXR data register status 0: Character is not transferred to the transmit shift register 1: Character has transferred to the transmit shift register (TXR_RXR data register is empty) The TXIF flag is the transmit data register empty flag. When this read only flag is “0”, it indicates that the character is not transferred to the transmitter shift register.
  • Page 164 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 3 STOPS: Number of Stop bits selection 0: One stop bit format is used 1: Two stop bits format is used This bit determines if one or two stop bits are to be used. When this bit is equal to “1”, two stop bits are used.
  • Page 165 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 5 BRGH: Baud Rate speed selection 0: Low speed baud rate 1: High speed baud rate The bit named BRGH selects the high or low speed mode of the Baud Rate Generator.

  • Page 166: Baud Rate Generator

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • TXR_RXR Register The TXR_RXR register is the data register which is used to store the data to be transmitted on the TX pin or being received from the RX pin. Name TXRX7...

  • Page 167: Uart Setup And Control

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU UART Setup and Control For data transfer, the UART function utilizes a non-return-to-zero, more commonly known as NRZ, format. This is composed of one start bit, eight or nine data bits, and one or two stop bits. Parity is supported by the UART hardware, and can be setup to be even, odd or no parity.

  • Page 168: Uart Transmitter

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU The following diagram shows the transmit and receive waveforms for both 8-bit and 9-bit data formats. Parity Bit Next Start Start Stop Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5...

  • Page 169: Uart Receiver

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU The read-only TXIF flag is set by the UART hardware and if set indicates that the TXR_RXR register is empty and that other data can now be written into the TXR_RXR register without overwriting the previous data.
  • Page 170 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU At this point the receiver will be enabled which will begin to look for a start bit. When a character is received the following sequence of events will occur: • The RXIF bit in the USR register will be set when the TXR_RXR register has data available.

  • Page 171: Managing Receiver Errors

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Managing Receiver Errors Several types of reception errors can occur within the UART module, the following section describes the various types and how they are managed by the UART. Overrun Error – OERR The TXR_RXR register is composed of a two byte deep FIFO data buffer, where two bytes can be held in the FIFO register, while a third byte can continue to be received.

  • Page 172: Uart Interrupt Structure

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU UART Interrupt Structure Several individual UART conditions can generate a UART interrupt. When these conditions exist, a low pulse will be generated to get the attention of the microcontroller. These conditions are a transmitter data register empty, transmitter idle, receiver data available, receiver overrun, address detect and an RX pin wake-up.

  • Page 173: Uart Power Down And Wake-Up

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Address Detect Mode Setting the Address Detect Mode bit, ADDEN, in the UCR2 register, enables this special mode. If this bit is enabled then an additional qualifier will be placed on the generation of a Receiver Data Available interrupt, which is requested by the RXIF flag.

  • Page 174: Scom/Sseg Function For Lcd

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU SCOM/SSEG Function for LCD The device has the capability of driving external LCD panels. The common and segment pins for LCD driving, SCOM0~SCOM17, SSEG0~SSEG17 and SSEG22~SSEG25, are pin-shared with certain pins on the I/O ports. The LCD signals, COM and SEG, are generated using the application program.

  • Page 175: Lcd Control Registers

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU signal output can have a value of V or a V value of (1/3)×V BIAS The SCOMm waveform is controlled by the application program using the FRAME bit in the SLCDC0 register and the corresponding pin-shared I/O data bit for the respective SCOMm pin to...
  • Page 176 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Register Name SLCDC0 FRAME ISEL1 ISEL0 LCDEN — — — — SLCDS0 COMSEGS7 COMSEGS6 COMSEGS5 COMSEGS4 COMSEGS3 COMSEGS2 COMSEGS1 COMSEGS0 SLCDS1 COMSEGS15 COMSEGS14 COMSEGS13 COMSEGS12 COMSEGS11 COMSEGS10 COMSEGS9 COMSEGS8 SLCDS2 — — COMSEGS17 COMSEGS16 LCD Driver Control Register List •...
  • Page 177 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 2 COMSEGS2: SCOM2/SSEG2 pin function selection 0: SCOM2 1: SSEG2 Bit 1 COMSEGS1: SCOM1/SSEG1 pin function selection 0: SCOM1 1: SSEG1 Bit 0 COMSEGS0: SCOM0/SSEG0 pin function selection 0: SCOM0 1: SSEG0 •...

  • Page 178: Low Voltage Detector - Lvd

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Low Voltage Detector – LVD The device has a Low Voltage Detector function, also known as LVD. This enables the device to monitor the power supply voltage, V , and provide a warning signal should it fall below a certain level.

  • Page 179: Interrupts

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU LVDEN LVDO LVDS LVD Operation The Low Voltage Detector also has its own interrupt which is contained within one of the Multi- function interrupts, providing an alternative means of low voltage detection, in addition to polling the LVDO bit.
  • Page 180 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Function Enable Bit Request Flag Notes CTMPE CTMPF — CTMAE CTMAF — STMPE STMPF — STMAE STMAF — PTMPE PTMPF — PTMAE PTMAF — Interrupt Register Bit Naming Conventions Register Name INTEG —...
  • Page 181 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 4 INT0F: INT0 interrupt request flag 0: No request 1: Interrupt request Bit 3 MF0E: Multi-function 0 interrupt control 0: Disable 1: Enable Bit 2 CPE: Comparator interrupt control 0: Disable 1: Enable...
  • Page 182 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • INTC2 Register Name UARTF SIMF INT1F TB1F UARTE SIME INT1E TB1E Bit 7 UARTF: UART interrupt request flag 0: No request 1: Interrupt request Bit 6 SIMF: SIM interrupt request flag 0: No request...
  • Page 183 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • MFI1 Register Name CTMAF CTMPF PTMAF PTMPF CTMAE CTMPE PTMAE PTMPE Bit 7 CTMAF: CTM Comparator A match interrupt request flag 0: No request 1: Interrupt request Bit 6 CTMPF: CTM Comparator P match interrupt request flag...

  • Page 184: Interrupt Operation

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Interrupt Operation When the conditions for an interrupt event occur, such as a TM Comparator P or Comparator A match or A/D conversion completion etc., the relevant interrupt request flag will be set. Whether the request flag actually generates a program jump to the relevant interrupt vector is determined by the condition of the interrupt enable bit.

  • Page 185: External Interrupt

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Legend EMI auto disabled in ISR Request Flag, no auto reset in ISR Request Master Priority Interrupt Name Enable Bits Vector Flags Enable Request Flag, auto reset in ISR High INT0 Pin INT0F...

  • Page 186: Comparator Interrupt

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Comparator Interrupt The comparator interrupt is controlled by the internal comparator. A comparator interrupt request will take place when the comparator interrupt request flag, CPF, is set, a situation that will occur when the comparator output bit changes state. To allow the program to branch to its respective interrupt vector address, the global interrupt enable bit, EMI, and comparator interrupt enable bit, CPE, must first be set.
  • Page 187 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU passes through a divider, the division ratio of which is selected by programming the appropriate bits in the TB0C or TB1C register to obtain longer interrupt periods whose value ranges. The clock source which in turn controls the Time Base interrupt period is selected using the CLKSEL0[1:0] and CLKSEL1[1:0] bits in the PSC0R and PSC1R register respectively.

  • Page 188: Tm Interrupts

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU 010: 2 PSC0 011: 2 PSC0 100: 2 PSC0 101: 2 PSC0 110: 2 PSC0 111: 2 PSC0 • TB1C Register Name TB1ON — — — — TB12 TB11 TB10 — — —...

  • Page 189: Uart Transfer Interrupt

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU UART Transfer Interrupt The UART Transfer Interrupt is controlled by several UART transfer conditions. When one of these conditions occurs, an interrupt pulse will be generated to get the attention of the microcontroller.

  • Page 190: Programming Considerations

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Programming Considerations By disabling the relevant interrupt enable bits, a requested interrupt can be prevented from being serviced, however, once an interrupt request flag is set, it will remain in this condition in the interrupt register until the corresponding interrupt is serviced or until the request flag is cleared by the application program.

  • Page 191: Rf Transceiver

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU RF Transceiver The RF transceiver incorporates a highly integrated 2.4GHz transceiver and a baseband modem with programmable data rates of 125Kbps, 250Kbps and 500Kbps. Data handling features include 3 levels of 32-byte TX/RX FIFO and packet handling such as whitening and CRC checking.

  • Page 192: Special Function Register

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Reset RF register RF RESET Reset TX FIFO pointer TX FIFO RESET Reset RX FIFO register RX FIFO RESET Set Register Bank SET REG. BANK Strobe Command Only (CmdO) Special Function Register Common Area Control Register Addr.
  • Page 193 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU The recommended values for the Common Bank 02h, 0Dh, 0Fh and 16h~18h registers are listed below: Addr Name Setting RSV1 RSV2 RSV3 RSV4 RSV5 RSV6 • CFG1: Configuration Control Register 1 Name —...
  • Page 194 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 5 XCLK_RDY: XCLK clock ready flag (ready only) 0: Not ready 1: Ready This bit is used to indicate whether the XCLK debounce counter is full and XCLK is ready for operation. Note that when exiting the Deep Sleep state, this flag may need a certain period before being set high.
  • Page 195 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • IRQ1: Interrupt Control Register 1 Name — RX_DR TX_DS MAX_RT RX_P_NO[2:0] TX_FULL — Reset Bit 7 Reserved, must be kept unchanged after power on RX_DR: RX data received into RX FIFO interrupt...
  • Page 196 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • IO1: I/O Control Register 1 Name PADDS[1:0] GIO2S[2:0] — — Reset Bit 7~6 PADDS[1:0]: PAD current control 00: 0.5mA 01: 1mA 10: 5mA 11: 10mA GIO2S[2:0]: GIO2 line function selection (only reset by POR)
  • Page 197 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 5 Reserved, must be kept unchanged after power on Bit 4~2 GIOPU[4:2]: GIO pin function pull-up enable control (only reset by POR) These bits control the pull-high function of the GIO4~GIO3 pins and GIO2 line respectively.
  • Page 198 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • RFCH: RF Channel Setting Register Name — RF_CH[6:0] — Reset Bit 7 Reserved, must be kept unchanged after power on Bit 6~0 RF_CH[6:0]: RF channel setting Real RF TX frequency = (2400+RF_CH[6:0])MHz •...
  • Page 199 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • RT2: PTX Retransmission Control Register 2 Name CNT_PLOS[3:0] CNT_ARC[3:0] Reset Bit 7~4 CNT_PLOS[3:0]: Lost packet counting in the same RF_CH The counter is overlow protected by 15 and is cleared when setting RF_CH.
  • Page 200 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Addr. Name P4B0 P4B0[7:0] P5B0 P5B0[7:0] — — P5ACTIVE P4ACTIVE P3ACTIVE P2ACTIVE P1ACTIVE P0ACTIVE — — XO_IL XO_TRIM[4:0] Note: Addresses 22h~25h and 39h~3Fh are not listed in this table and are reserved for future use, it is suggested not to change their initial values by any methods.
  • Page 201 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • RSSI1: RSSI Control Register 1 Name — — — — RSSI_CTHD[3:0] — — — — Reset Bit 7~4 Reserved, must be kept unchanged after power on Bit 3~0 RSSI_CTHD[3:0]: RSSI threshold for carrier detection (unit: -dBm) (RSSI_CTHD[3:0]×2+1)+74=RSSI threshold for carrier detection...
  • Page 202 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Bit 1 EN_ACK_PLD: PRX acknowledge with payload function enable 0: Disable 1: Enable Bit 0 EN_DYN_ACK: PTX “write TX FIFO with No-Auto-ACK” command enable 0: Disable 1: Enable • RXPW0: RX Payload Length Control Register 0 Name —...
  • Page 203 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • RXPW4: RX Payload Length Control Register 4 Name — — RX_PW_P4[5:0] — — Reset Bit 7~6 Reserved, must be kept unchanged after power on Bit 5~0 RX_PW_P4[5:0]: Pipe 4 RX payload static length setting. It takes effect when DPL_P4=0.
  • Page 204 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • P4B0: Pipe4 Sync Word Control Register Name P4B0[7:0] Reset Bit 7~0 P4B0[7:0]: Receive address (sync word) LSByte in Pipe 4. MSBytes is equal to P1_SYNC[39:8]. • P5B0: Pipe5 Sync Word Control Register...

  • Page 205: Bank 2 Control Register

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU The recommended values for the Bank 1 registers are listed below: Addr Name Setting RSV1 RSV2 RSV3 Bank 2 Control Register All control registers will be set to their initial value by power-on reset (POR).

  • Page 206: Functional Description

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Functional Description 2.4GHz RF Transceiver The RF Transceiver adopts a fully-integrated, low-IF receiver architecture. The received RF signal is first amplified by a low noise amplifier (LNA), after which the frequency is down-converted to an intermediate frequency (IF) by a quadrature mixer.
  • Page 207 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Description CmdO CmdD Data Bytes Read RX FIFO Command √ 1~32 Write PRX Pipe 1 Address √ Read PRX Pipe 1 Address √ Write TX FIFO with No-Auto-ACK Mode √ 1~32 Command Write Pipe 0 ACK Payload Command √...

  • Page 208: State Machine

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU …… SDIO …… RF IC will change the data RF IC will latch address bits RF IC will latch data bits at the falling edge of SCK at the rising edge of SCK...
  • Page 209 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU There are eight operating modes in the RF Transceiver from the viewpoint of current consumption, as listed below. 1. Power Down state 2. Deep Sleep state: 3.3V I/O on 3. Light Sleep state: BG (Bandgap) and XO on 4.
  • Page 210 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU EN is reset by hardware indicating that the calibration is complete. The calibration function can only be activated in the Light Sleep state. To get an accurate RF frequency, an appropriate VCO curve needs to be set by the VCO calibration process.
  • Page 211 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU RF Data Rate The Data Rate of the RF Transceiver is programmable, which is 125/250/500Kbps. Packet Format The RF Transceiver supports Burst mode packet format as shown in the figure below. The 9-bit Packet Control Field (PCF) is optional and is enabled by default to be compatible with the BC516x/ BC66F5132 devices.
  • Page 212 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU pipes are enabled using the bits in the PEN register. By default, only data pipe 0 and 1 are enabled. Each pipe can have up to 5 bytes of configurable address. Pipe 0 and 1 have their corresponding commands to configure the address.
  • Page 213 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU • NO_ACK: 1 bit This field is a 1-bit no acknowledge indication flag. The NO_ACK flag is only used when the auto-acknowledgement feature is enabled. Setting the flag high will inform the receiver that the packet is not to be auto-acknowledged.
  • Page 214 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Security Function The security function, which is optional and is set by the WHT_EN bit, is implemented by LFSR (Data Whitening/De-Whitening) for the RF Transceiver. The formula listed below calculates both of payload and CRC field (Data In). The Packet Encryption Key is WHT_PTN[6:0], its initial value is WHTSD[6:0].
  • Page 215 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU out” mode. The TX FIFO in a PRX device will be used to acknowledge the corresponding pipe. The RX FIFO in a PRX device can contain the received payloads from up to three different PTX devices.

  • Page 216: Abbreviation

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU PTX0 PTX1 PTX2 PTX3 PTX4 PTX5 Data Data Data Data Data Pipe1 Pipe4 Data Pipe2 Pipe3 Pipe0 Pipe5 Addr Data Pipe 0 (RX_PW_P0) Addr Data Pipe 1 (RX_PW_P1) Addr Data Pipe 2 (RX_PW_P2)

  • Page 217: Application Circuits

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU PCF: Packet Control Field PD: Power Down PFD: Phase Frequency Detector PID: Packet Identity Bits PLD: Payload PLL: Phase Lock Loop POR: Power On Reset PRX: Primary RX PTX: Primary TX PVT: Process-Voltage-Temperature...

  • Page 218: Instruction Set

    In the case of Holtek microcontroller, a comprehensive and flexible set of over 60 instructions is provided to enable programmers to implement their application with the minimum of programming overheads.

  • Page 219: Logical And Rotate Operation

    The standard logical operations such as AND, OR, XOR and CPL all have their own instruction within the Holtek microcontroller instruction set. As with the case of most instructions involving data manipulation, data must pass through the Accumulator which may involve additional programming steps.

  • Page 220: Instruction Set Summary

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Instruction Set Summary The instructions related to the data memory access in the following table can be used when the desired data memory is located in Data Memory sector 0. Table Conventions x: Bits immediate data...
  • Page 221 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Mnemonic Description Cycles Flag Affected Data Move MOV A,[m] Move Data Memory to ACC None MOV [m],A Move ACC to Data Memory Note None MOV A,x Move immediate data to ACC None Bit Operation CLR [m].i...

  • Page 222: Extended Instruction Set

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Extended Instruction Set The extended instructions are used to support the full range address access for the data memory. When the accessed data memory is located in any data memory sector except sector 0, the extended instruction can be used to directly access the data memory instead of using the indirect addressing access.
  • Page 223 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Mnemonic Description Cycles Flag Affected Branch LSZ [m] Skip if Data Memory is zero Note None LSZA [m] Skip if Data Memory is zero with data movement to ACC Note None LSNZ [m]...

  • Page 224: Instruction Definition

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Instruction Definition ADC A,[m] Add Data Memory to ACC with Carry Description The contents of the specified Data Memory, Accumulator and the carry flag are added. The result is stored in the Accumulator.
  • Page 225 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU CALL addr Subroutine call Description Unconditionally calls a subroutine at the specified address. The Program Counter then increments by 1 to obtain the address of the next instruction which is then pushed onto the stack.
  • Page 226 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU DEC [m] Decrement Data Memory Description Data in the specified Data Memory is decremented by 1. Operation [m] ← [m] − 1 Affected flag(s) Decrement Data Memory with result in ACC DECA [m] Description Data in the specified Data Memory is decremented by 1.
  • Page 227 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU No operation Description No operation is performed. Execution continues with the next instruction. Operation No operation Affected flag(s) None Logical OR Data Memory to ACC OR A,[m] Description Data in the Accumulator and the specified Data Memory perform a bitwise logical OR operation.
  • Page 228 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU RLA [m] Rotate Data Memory left with result in ACC Description The contents of the specified Data Memory are rotated left by 1 bit with bit 7 rotated into bit 0. The rotated result is stored in the Accumulator and the contents of the Data Memory remain unchanged.
  • Page 229 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU RRCA [m] Rotate Data Memory right through Carry with result in ACC Description Data in the specified Data Memory and the carry flag are rotated right by 1 bit. Bit 0 replaces the Carry bit and the original carry flag is rotated into bit 7. The rotated result is stored in the Accumulator and the contents of the Data Memory remain unchanged.
  • Page 230 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU SET [m] Set Data Memory Description Each bit of the specified Data Memory is set to 1. Operation [m] ← FFH Affected flag(s) None Set bit of Data Memory SET [m].i Description Bit i of the specified Data Memory is set to 1.
  • Page 231 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU SUBM A,[m] Subtract Data Memory from ACC with result in Data Memory Description The specified Data Memory is subtracted from the contents of the Accumulator. The result is stored in the Data Memory. Note that if the result of subtraction is negative, the C flag will be cleared to 0, otherwise if the result is positive or zero, the C flag will be set to 1.
  • Page 232 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU TABRD [m] Read table (specific page) to TBLH and Data Memory Description The low byte of the program code (specific page) addressed by the table pointer (TBLP and TBHP) is moved to the specified Data Memory and the high byte moved to TBLH.

  • Page 233: Extended Instruction Definition

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU Extended Instruction Definition The extended instructions are used to directly access the data stored in any data memory sections. LADC A,[m] Add Data Memory to ACC with Carry Description The contents of the specified Data Memory, Accumulator and the carry flag are added.
  • Page 234 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU LCPL [m] Complement Data Memory Description Each bit of the specified Data Memory is logically complemented (1′s complement). Bits which previously contained a 1 are changed to 0 and vice versa. Operation [m] ← [m]...
  • Page 235 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU LMOV A,[m] Move Data Memory to ACC Description The contents of the specified Data Memory are copied to the Accumulator. Operation ACC ← [m] Affected flag(s) None Move ACC to Data Memory LMOV [m],A Description The contents of the Accumulator are copied to the specified Data Memory.
  • Page 236 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU LRR [m] Rotate Data Memory right Description The contents of the specified Data Memory are rotated right by 1 bit with bit 0 rotated into bit 7. Operation [m].i ← [m].(i+1); (i=0~6) [m].7 ← [m].0...
  • Page 237 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU LSDZ [m] Skip if decrement Data Memory is 0 Description The contents of the specified Data Memory are first decremented by 1. If the result is 0 the following instruction is skipped. As this requires the insertion of a dummy instruction while the next instruction is fetched, it is a three cycle instruction.
  • Page 238 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU LSNZ [m] Skip if Data Memory is not 0 Description If the content of the specified Data Memory is not 0, the following instruction is skipped. As this requires the insertion of a dummy instruction while the next instruction is fetched, it is a three cycle instruction.
  • Page 239 BC66F5652 2.4GHz RF Transceiver A/D Flash MCU LSZ [m].i Skip if bit i of Data Memory is 0 Description If bit i of the specified Data Memory is 0, the following instruction is skipped. As this requires the insertion of a dummy instruction while the next instruction is fetched, it is a three cycle instruction.

  • Page 240: Package Information

    Package Information Note that the package information provided here is for consultation purposes only. As this information may be updated at regular intervals users are reminded to consult the Holtek website for the latest version of the Package/Carton Information. Additional supplementary information with regard to packaging is listed below. Click on the relevant section to be transferred to the relevant website page.

  • Page 241: Saw Type 46-Pin Qfn (6.5Mm×4.5Mm×0.75Mm) Outline Dimensions

    BC66F5652 2.4GHz RF Transceiver A/D Flash MCU SAW Type 46-pin QFN (6.5mm×4.5mm×0.75mm) Outline Dimensions Dimensions in inch Symbol Min. Nom. Max. 0.028 0.030 0.031 0.000 0.001 0.002 — 0.008 BSC — 0.006 0.008 0.010 — 0.256 BSC — — 0.177 BSC —...
  • Page 242 However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise.

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