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Toradex Verdin Manual

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Verdin Computer Module
Carrier Board Design Guide

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Summary of Contents for Toradex Verdin

  • Page 1 Verdin Computer Module Carrier Board Design Guide...
  • Page 2 February 5, 2021 V0.94 Section 2.3.2.2: Update figure 15 Section 2.5.2.1: Update figure 28 Section 2.7.2: Update figure 36 Page | 2 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 3: Table Of Contents

    Reference Schematics ..................47 2.10.2 Unused UART Signal Termination ..............49 2.10.3 2.11 SPI ..........................49 SPI Signals ..................... 50 2.11.1 Page | 3 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 4 Single Cell Battery Power Approach ..............77 3.4.3 Backfeeding ........................79 Introduction ......................79 3.5.1 What is Backfeeding .................... 80 3.5.2 Page | 4 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 5 Appendix B – Module Bottom Side Signal Definition ........... 103 Appendix C - Physical Pin Definition and Location ............. 107 Page | 5 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 6: Introduction

    These interfaces are detailed in the respective datasheets of Verdin SoMs. Some Verdin modules do not feature the full set of the "Reserved" interfaces. It is strongly recommended to always read the datasheet of the module that is intended to be used with and off-the-shelf or a custom carrier board.

  • Page 7: Verdin Reference Designs

    Schematic files, assembly drawings, bills of material and the complete Altium project files for the Verdin reference carrier boards are available for download for free. There is also an online viewer available which is convenient to use for customers without a license for Altium.
  • Page 8 Registered Jack, common name for the 8P8C modular connector that is used for Ethernet wiring RMII Reduced Media-Independent Interface, interface between Ethernet MAC and PHY for up to 100Mb/s Page | 8 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 9 Universal Serial Bus, serial interface for internal and external peripherals Positive supply voltage Video Graphics Array, analog video interface for monitors Table 1: Abbreviations Page | 9 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 10: Interfaces

    Verdin Carrier Board Design Guide Preliminary – Subject to Change 2 Interfaces 2.1 Architecture The block diagram in Figure 1 shows the basic architecture of the Verdin module, depicting the “Always Compatible” interfaces, “Reserved” interfaces, and some examples of “Module-specific” interfaces. 1x Gigabit Ethernet 1x RGMII M.2 1216...

  • Page 11: Always Compatible" Interfaces

    "Reserved" interfaces are features that are defined and reserved, but possibly missing on some Verdin SoMs. The reason for that could be that a certain SoC does not feature an interface or there is an assembly option which omits certain interfaces for cost optimization purposes. Replacement pins must be electrically compatible with the functionality specified.

  • Page 12: Reserved" Interfaces

    Verdin modules. If a module does not feature all possible instances of "Reserved" interfaces (defined by the Verdin standard), interfaces will be filled in an ascending order (starting from the lowest instance index).

  • Page 13: Module-Specific" Interfaces

    Pin 145 Pin 259 Figure 1: Pin numbering schema on the top side of the module (top view) Page | 13 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 14 Pin 143 Pin 145 Pin 259 Figure 3: Pin numbering schema on the module connector land pattern (top view) Page | 14 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 15: Pci Express

    Normally, the signals are named from the host’s perspective until they reach the pins of the PCIe device. Therefore, the transmitting pins of the Verdin modules should be called TX at the carrier board while the receiving pins of the module should be called RX. Please carefully read the datasheet of the PCIe device to make sure that RX and TX are not inadvertently swapped.
  • Page 16 The PCIe x1 slot connector has two card present signals (PRSNT1#, pin A1 and PRSNT2#, pin B18) which are shorted to ground by the card (if it is inserted). Since the Verdin standard does not feature the PCIe hot-plug feature, these pins can be left unconnected or connected to any free module GPIOs if the presence detection of the card needs to be emulated.
  • Page 17 SMB and I2C buses are compatible from a hardware perspective, it is recommended that the general purpose I2C_1 interface of the Verdin module is used if the SMB interface is needed. Most PCIe cards do not make use of the SMB interface though. Therefore, these pins can be left unconnected for most applications.
  • Page 18 PCIe card has a 3.3V logic level for the reset input (PERST#, pin 22) and the PCIE_1_RESET# output of the module is only 1.8V, a level shifter is required. Please note that the in the Verdin module standard does not support PCIe hot-plug functionality.
  • Page 19 10uF 10uF USBH_D_N USB_2_D_N GND_PAD USBH_D_P USB_2_D_P SC4215A USB_2_EN USB_2_OC# 2309409-2 Figure 8: Mini PCIe card reference schematic Page | 19 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 20 RX lanes (TX from the device) need to be placed on the carrier board. As the capacitors for the TX lanes are located on the Verdin module, no additional capacitors should be place on the TX lines. The reference clock lines do not need decoupling capacitors.

  • Page 21: Unused Pcie Signals Termination

    LED indication output for activity on the Ethernet port tolerant 3.3V ETH_1_LINK LED indication output for established Ethernet link tolerant Table 6: Ethernet signals Page | 21 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 22 Try to place the magnetics as close as possible to the Ethernet jack. This reduces the length of the signal traces between the magnetics and jack. Page | 22 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 23 The MDI2 and MDI3 lanes are not used for the 10/100Base-TX interface. These signals can be left unconnected. Page | 23 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 24: Reduced Gigabit Media-Independent Interface Ethernet Port

    Management interface data (bidirectional, needs pull-up on ETH_2_RGMII_MDIO 1.8V carrier board) ETH_2_RGMII_INT# 1.8V Optional interrupt, requires an pull-up on the carrier board Page | 24 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 25: Usb

    Figure 15: RGMI reference schematic 2.4 USB The Verdin specifications contain two USB ports. One port is an OTG port which can be configured as host or client. This port is usually used in the recovery mode for loading new software onto the module.

  • Page 26: Usb Signals

    Not all the USB 3.x transfer modes are possible with the Verdin module, since in the Verdin standard only one lane of SuperSpeed signals are reserved. The actual possible USB 3.x mode varies also by the module itself. Therefore, it is important to check the module datasheet whether the SuperSpeed signals are available and which maximum speed they support.

  • Page 27: Reference Schematics

    Normally, the signals are named after the host until they reach the pins of the USB device. Therefore, the transmitting pins on the Verdin module should be called TX on the carrier board while the receiving pins should be called RX.
  • Page 28 This means no multiplexer is required if the SuperSpeed signals are not provided to the connector. Page | 28 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 29 100K USB_2_SSRX_N USB_2_SSRX_P ESD9101P2T5G ESD9101P2T5G ESD9101P2T5G USB_2_D_N USB_2_D_P USB_2_EN USB_2_OC# 2309409-2 Figure 21: USB 2.0 client reference schematic Page | 29 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 30 SuperSpeed RX lane (TX from the device) need to be placed on the carrier board. As the capacitors for the TX lane are located on the Verdin module, no additional capacitors are required nor permitted on the TX lines.
  • Page 31 VDD12 USBH4_SSRX_P USB3DN_RXDP4 USBH4_SSRX_N VSS-TH USB3DN_RXDM4 USB5744T-I/2G Figure 25: USB 3.0 device down reference schematic (USB3.1 Gen1 Hub) Page | 31 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 32: Unused Usb Signal Termination

    Figure 26: USB 2.0 host block diagram Limiting the USB host port to USB 2.0 can cut cost on the carrier board. Additionally, not all Verdin modules support the SuperSpeed signals for the USB_2 port. The implementing an USB 2.0 host port means that the SuperSpeed signals of the module edge connector can be left unconnected.

  • Page 33: Hdmi/Dvi

    Such cables are not standardized. They provide the DDC on either the DVI or VGA output. Please be aware of this when using a similar Y-cable. Page | 33 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 34 VGA output. The DDC signals require a level shifter since the signal level on the Verdin module is 1.8V while the DVI uses 5V. The same is necessary for the hot plug detect signal. The TDMS signals need to be ESD protected using diodes. The schematic example shows a discrete solution for the level shifting and protection.

  • Page 35: Unused Hdmi/Dvi Signal Termination

    However, image data can only be sent in the high-speed mode which uses also the external clock signal. Page | 35 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 36: Mipi Dsi Signals

    Dedicated general-purpose IO for DSI bridges Table 14: MIPI DSI signals Additional to the high-speed MIPI DSI signals, the Verdin reserves also pins for a dedicated I C, a PWM, and two GPIOs for the DSI interface. These signals are intended to be used for controlling an attached display as well as DSI bridges.
  • Page 37 LT8912B 1.8K 1.8K I2C_1_SDA LT8912B I²C address 0x48 I2C_1_SCL 2309409 -2 Figure 30: DSI to HDMI reference schematic Page | 37 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 38 ADDR = 0, SN65DSI84 I ²C address 0x2C ADDR = 1, SN65DSI84 I ²C address 0x2D NTZD3154NT1G Figure 31: DSI to LVDS reference schematic Page | 38 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 39: Mipi Dsi Display Adapters

    However, the location of pin 1 needs to be different for mating these two boards together. Page | 39 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 40 34, 40, 50, 55, 60 1, 2, 5, 17, 29, 41, 53 Table 16: MIP DSI display adapter Page | 40 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 41 Pin 60 Pin 59 Ø6.00 42.00 Figure 35: MIPI DSI display adapter dimensions (top view through the PCB) Page | 41 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 42: Unused Mipi Dsi Signal Termination

    CSI-2. This version interfaces use the MIPI D-PHY as physical layer which is also used for the MIPI DSI interface on the Verdin module. As with the MIPI DSI, the first data lane is bidirectional.

  • Page 43: Mipi Csi-2 Signals

    However, for longer camera cables or trace length on the carrier board, the master clock signal can become a source for EMI issues. Check also whether the selected Verdin module can provide the correct frequency for the camera. Alternatively, an external oscillator or crystal can be used.

  • Page 44: Sd/Mmc/Sdio

    IO voltage together with the bus or remain at 1.8V. The behavior depends on the Verdin module. The circuit on the carrier board needs to allow for having different IO voltages on these pins, depending on the module and the card that is inserted.

  • Page 45: Unused Sd/Mmc/Sdio Interface Signal Termination

    All unused SD interface signals can be left unconnected. If the SD/MMC/SDIO ports is unused, the signal could be used as GPIO. Check the datasheet of the Verdin module whether there are any restrictions for using the signals as GPIOs.

  • Page 46: I 2 C Signals

    The interface may be used as general purpose UART. Page | 46 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 47: Uart Signals

    UART_1_CTS Clear to Send DCE indicates ready to accept data Input Output Table 24: RS232 Signal Modes Page | 47 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 48 UART interface. The RTS signal is only available on the UART_1 and UART_2 as Verdin standard interface. The schematic shown below inverts the RTS signal for the data enable input of the transceiver. Some modules allow inverting the signal in software, but it is recommended to keep the inverter circuit in in the RTS signal to maintain compatibility with different modules and drivers provided by Toradex.

  • Page 49: Unused Uart Signal Termination

    Clock has negative polarity and the data is latched at the negative edge of SCK Table 25: SPI Modes Page | 49 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 50: Spi Signals

    2.11.1 SPI Signals A SPI bus consists of one master and one or many slaves. In the Verdin standard, the module is the SPI master. Some modules may also allow themselves to be used as SPI slaves. Some modules may provide this function on different, non-standard pins.

  • Page 51: Can

    CAN specifications are available. Make sure that the corresponding Verdin module complies with the required version. Some Verdin modules support CAN FD for up to 5 times higher data rates and larger message sizes (compared to “regular” CAN).

  • Page 52: Pwm

    826936-3 Figure 43: PWM Example Schematic 2.14.3 Unused PWM Signal Termination Unused PWM signals can be left unconnected. Page | 52 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 53: Inter-Ic Sound (I S)

    1.8V Synchronization/ field select/ left-right channel select I2S_2_BCLK CMOS 1.8V Serial bit clock Table 30: Digital Audio Signals Page | 53 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 54: Reference Schematics

    The unused analog input signals can be left unconnected or tied to the ground. It is recommended to disable the corresponding inputs in the driver or disable the whole ADC block if unused. Page | 54 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 55: General Purpose Clock Outputs

    For example, if the audio codec or the camera needs to be located far away from the Verdin computer module, it might be a better solution to use an oscillator instead of the reference clock output of the module. This oscillator can be placed close to the audio codec or camera.

  • Page 56: Unused Gpio Termination

    JTAG_1_TDO JTAG_1_TDO JTAG_1_TDO JTAG_1_TDI JTAG_1_VREF JTAG_1_VREF JTAG_1_TCK JTAG_1_TRST# JTAG_1_TCK JTAG_1_TMS JTAG_1_TMS FTSH-105-01-L-DV-K 2309409-2 Figure 45: JTAG Example Schematic Page | 56 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 57: Unused Jtag Signal Termination

    2309409-2 RECOVERY BUTTON CTRL_RECOVERY_MICO# CTRL_PWR_BTN_MICO# TD-03XB CTRL_FORCE_OFF_MOCI# CTRL_WAKE1_MICO# CTRL_PWR_EN_MOCI CTRL_SLEEP_MOCI# CTRL_RESET_MOCI# CTRL_RESET_MICO# 2309409-2 Figure 46: Recovery Reference Schematic Page | 57 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 58: Unused Recovery Signal Termination

    The CTRL_RECOVERY_MICO# can be left unconnected if the recovery feature is not needed. There is a pull-up resistor on the module. No external pull-up resistor is allowed on the carrier board. Page | 58 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 59: Power Management

    USB power port. The Verdin form factor is targeted for Thermal Design Power (TDP) of up to 5W for the module. Based on the power supply rating of the connector pins and the number of pins assigned as main (VCC) power supply pins, the maximum current draw form VCC is 2.5 amps.

  • Page 60: Module Power States

    The power consumption of the module is very low in this state. The VCC rail is only used for keeping the power management circuits and the RTC on. The actual consumption can be found in the datasheets of Verdin modules.
  • Page 61 The module automatically transitions to the running mode when the VCC main power rail is applied to the module. In other words, all Verdin modules are ramping up the power rails and boot the system when the VCC is applied.

  • Page 62: General Power Sequences

    CTRL_PWR_EN_MOCI and releasing the carrier board reset. It is important that the module is ramping up the voltage rails withing 10ms after the CTRL_PWR_EN_MOCI is released. Page | 62 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 63: Running" To "Reset" (Reset)

    After all the rails are removed, the module will remain in this state for a minimum reset time. The reset time can be extended by keeping the CTRL_RESET_MICO# low. Page | 63 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 64: Reset" To "Running" (Startup After Reset)

    See sequence description in section “No VCC” to “Running” (startup). Page | 64 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 65: Running" To "Sleep" (Sleep)

    Page | 65 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 66: Sleep" To "Running" (Wake)

    GPIO as reset signal. Page | 66 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 67: Running" To "Module Off" (Shutdown)

    CTRL_FORCE_OFF_MOCI# signals and does not implement the kill feature, VCC will remain applied to the module and the system will remain in the “Module OFF” state. Page | 67 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 68: Running" To "No Vcc" (Force Off)

    After all rails have been removed, there is a delay after which the CTRL_FORCE_OFF_MOCI# goes low. Page | 68 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 69: Module Off" To "Running" (Startup After Shutdown)

    After detecting the power button event, the module begins to ramp up all the voltage rails in the same sequence as described in section ”No VCC” to “Running” (startup). Page | 69 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 70: Module Off" To "No Vcc" (Power Off After Shutdown)

    Therefore, the removal of the VCC should be avoided if the system was not shut down properly in advance. Page | 70 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 71: Power Supply Use Cases

    Preliminary – Subject to Change 3.4 Power Supply Use Cases The power control pins of the Verdin module are very flexible and allow different use cases for the power supply on the carrier board. The following approaches are just examples for the most common use cases.
  • Page 72 Verdin Carrier Board Design Guide Preliminary – Subject to Change module. The Verdin module is then enabling the peripheral power rails on the carrier board by asserting the CTRL_PWR_EN_MOCI signal. There is an optional pull-down resistor on the CTRL_PWR_EN_MOCI signal. This resistor makes sure the power supplies are not turning on if there is no module inserted.
  • Page 73 (e.g. 7 seconds) than the 5 second limit the Verdin module has. This makes sure that the module is performing the force OFF cycle before the power button IC is removing VCC by the long press event.

  • Page 74: Minimalist Carrier Board Power Approach

    - no extra 1.8V buck converter is needed. Page | 74 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 75 CTRL_RESET_MICO# input. Short pressing the power button when the system is booted generates a software interrupt. Depending on the configuration, the OS will then start shutting down the Page | 75 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 76 The reference schematics below show the minimum amount of external components that are required for running the Verdin module. Page | 76 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 77: Single Cell Battery Power Approach

    Single Cell Battery Power Approach 3.4.3 The wide input voltage range of the Verdin module allows it to run directly form a single cell Li-ion battery. This makes it much easier to implement a rechargeable battery solution for the Verdin module.
  • Page 78 2.7V, a suitable option could be using an LDO regulator with a very low dropout or a buck converter with constant-on option. Page | 78 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 79: Backfeeding

    Verdin carrier board design. Page | 79 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 80: What Is Backfeeding

    Backfeeding is sometimes also called backflow. To understand what backfeeding is, we need to look at the internal circuit of an input pin. Most Verdin module pins (and also peripheral device input pins) feature ESD protection diodes. These protection diodes provide basic protection for electrostatic discharge.
  • Page 81 If the module output signals are still driven high, the module can feed back the peripheral rail. Page | 81 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 82: Potential Issues Caused By Backfeeding

    If the IO rail reaches a certain voltage level, it could mean that some power-on-reset circuits are not triggering when fully turning on the power rails since the reset was already released. This can Page | 82 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 83: Identify Backfeeding Issues

    A power domain is a group of devices or peripherals which are always in the same power state. Figure 69 shows a simple example of a system block diagram. The Verdin module and the RS232 transceiver are in the same power domain. The transceiver uses the PWR_1V8_MOCI, which switches on together with the IO rails of the module.
  • Page 84 The signal states of the external devices like the RS232 signals of the host PC or the display's HDMI signals are hard to control by the Verdin module and the carrier board. Therefore, it might be required to take other countermeasures for preventing the backfeeding of these interfaces.
  • Page 85 ( �� ) ∙ �� − �� ���� �������� �������� �������� �� ≈ �� ���������� �� ���� �������� Page | 85 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 86: Backfeeding Prevention

    There are other solutions that are not discussed here. Some backfeeding countermeasures are specific to an interface. Therefore, following the reference schematics is advised. Page | 86 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 87 An example of this backfeeding prevention solution is the SD card interface of the Verdin module. The SD card signals feature pull-up resistors, either located inside the SoC or on the Verdin module.
  • Page 88 Verdin module is powered off. In this situation, the USB_1_VBUS can carry 5V, or the USB 2.0 data signals could be pulled up to 3.3V. The Verdin module already prevents backfeeding over the USB_1_VBUS and the USB data signals. Therefore, no further backfeeding prevention is required for these signals on the carrier board.
  • Page 89 IO Rail (off) PWR_1V8_MOCI (off) Peripheral Rail (on) 1.8V Open-Drain Peripheral 1.8V Figure 78: Simple FET circuit for open-drain signals Page | 89 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 90 Peripheral Rail (on) 1.8V High 1.8V Module Pin Figure 80: Diode circuit for backfeeding prevention with an external pull-up resistor Page | 90 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 91 Placing an additional buffer in the signal path can prevent backfeeding. The buffer needs to be powered from the same domain as the rail of the input. If the Verdin module is the signal input, using the PWR_1V8_MOCI as the buffer's power supply is the right approach (if the PWR_1V8_MOCI can provide enough current).
  • Page 92 IO Rail (off) Peripheral Rail (on) 1.8V Output Enable High 1.8V Module Pin Peripheral Figure 84: Tristate buffer Page | 92 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 93 IO Rail (off) Peripheral Rail (on) 1.8V High 1.8V Peripheral Figure 86: Galvanic isolation between input and output Page | 93 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 94 IO Rail (on) Peripheral Rail (off) 1.8V High Module Pin Peripheral Figure 88: Additional load on peripheral rail Page | 94 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 95: Mechanical And Thermal Consideration

    2 which has a connector height of 5.2mm that provides a board-to-board distance of 2.62mm. The Verdin module does not follow the JEDEC specifications which allow only a maximum of 1.2 mm for components on the top and bottom side of the module. The components on the top side of the Verdin module are limited to 3.0 mm height while the absolute maximum height for...

  • Page 96: Fixation Of The Module

    M2 screws. The spacers on Toradex carrier boards to be used with Verdin modules are only 2 mm tall which allows for an easier insertion and a better mounting experience. However, for a final product, it is recommended to use 2.5 mm spacers, especially if a heatsink is also mounted with those spacers.

  • Page 97: Module Dimensions

    Figure 90: Module dimensions top side (mm) On the bottom side of the Verdin module, there are 10 test pads (5 on each side). These pads are used by the module manufacturer for test purposes. On a customer carrier board, these test pads do not need to be connected.

  • Page 98: Carrier Board Space Requirements

    4.6 Carrier Board Space Requirements The required PCB area for the module depends on the module fixing method and the cooling solution. Page | 98 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 99: Appendix A - Module Top Side Signal Definition

    Differential Pair Output "Reserved" HDMI_1_TXD0_P Differential Pair Output "Reserved" HDMI_1_TXD1_N Differential Pair Output "Reserved" HDMI_1_TXD1_P Differential Pair Output "Reserved" Page | 99 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 100 "Always Compatible" USB_1_ID Input 1.8V "Always Compatible" USB_1_D_N Differential Pair Bidirectional "Always Compatible" USB_1_D_P Differential Pair Bidirectional "Always Compatible" Page | 100 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 101 Power Input 3.135 – 5.5V "Always Compatible" Power Power Input 3.135 – 5.5V "Always Compatible" Power Input 3.135 – 5.5V "Always Compatible" Page | 101 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 102 Preliminary – Subject to Change Power Input 3.135 – 5.5V "Always Compatible" Power Input 3.135 – 5.5V "Always Compatible" Page | 102 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 103: Appendix B - Module Bottom Side Signal Definition

    Output 3.3V/1.8V "Always Compatible" SD_1_CLK Output 3.3V/1.8V "Always Compatible" SD_1_D0 Bidirectional 3.3V/1.8V "Always Compatible" SD_1_D1 Bidirectional 3.3V/1.8V "Always Compatible" Page | 103 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 104 GND/ Low Speed/ Single Ended "Module-specific" MSP_34 Differential Pair/ Single Ended "Module-specific" MSP_35 Differential Pair/ Single Ended "Module-specific" Page | 104 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 105 "Always Compatible" System Control CTRL_WAKE1_MICO# Input 1.8V "Always Compatible" CTRL_PWR_EN_MOCI Output 1.8V "Always Compatible" CTRL_SLEEP_MOCI# Output 1.8V "Always Compatible" Page | 105 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 106 Preliminary – Subject to Change CTRL_RESET_MOCI# Open Drain Output, 3.3V Tolerant "Always Compatible" CTRL_RESET_MICO# Open Drain Input 1.8V "Always Compatible" Page | 106 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 107: Appendix C - Physical Pin Definition And Location

    HDMI_1_CEC QSPI_1_CS2# QSPI_1_DQS HDMI_1_TXC_N HDMI HDMI_1_TXC_P SD_1_D2 SD_1_D3 HDMI_1_TXD0_N SD_1_CMD SDIO HDMI_1_TXD0_P SD_1_PWR_EN SD_1_CLK HDMI_1_TXD1_N SD_1_D0 HDMI_1_TXD1_P SD_1_D1 Page | 107 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 108 MSP_27 UART_4_RXD MSP_28 UART_4_TXD MSP_29 USB_1_EN MSP_30 "Module-specific" USB_1_OC# USB_1_VBUS MSP_31 USB_1_ID MSP_32 USB_1_D_N MSP_33 USB_1_D_P MSP_34 MSP_35 Page | 108 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 109 ETH_1_ACT PCIE_1_L0_TX_N ETH_1_MDI2_P PCIE_1_L0_TX_P ETH_1_MDI2_N PCIE_1_RESET# ETH_1_MDI3_N CTRL_RECOVERY_MICO# ETH_1_MDI3_P CTRL_PWR_BTN_MICO# VCC_BACKUP CTRL_FORCE_OFF_MOCI# System Control CTRL_WAKE1_MICO# Power CTRL_PWR_EN_MOCI CTRL_SLEEP_MOCI# Page | 109 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 110 Verdin Carrier Board Design Guide Preliminary – Subject to Change CTRL_RESET_MOCI# CTRL_RESET_MICO# Page | 110 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 111 Brand and product names are trademarks or registered trademarks of their respective owners. Specifications are subject to change without notice. Page | 111 Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

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Verdin imx8mm

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