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Toradex Apalis Series Design Manual

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Apalis Computer Module
Carrier Board Design Guide

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Summary of Contents for Toradex Apalis Series

  • Page 1 Apalis Computer Module Carrier Board Design Guide...
  • Page 2 Section 3.5: Clarify POWER_ENABLE_MOCI pull down resistor Section 4.1: Add information regarding alternate module connectors Section 4.3: Clarify operating temperature range Page | 2 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 3: Table Of Contents

    Unused Parallel Camera Interface Signal Termination ..........46 2.11.2 2.12 Camera Serial Interface (MIPI/CSI-2) .................. 46 2.13 SD/MMC/SDIO ........................46 SD/MMC/SDIO Signals ..................47 2.13.1 Page | 3 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 4 Power Management Signals ..................63 3.1.3 Power Block Diagram ......................64 Power States ........................64 Power Sequences ......................66 Page | 4 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 5 Connector and MXM SnapLock Land Pattern Requirements ..........75 Carrier Board Space Requirements ..................76 Appendix A – Physical Pin Definition and Location ............... 79 Page | 5 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 6: Introduction

    Please note that the Developer Centre is common for all Toradex products. You should always check to ensure if information is valid or relevant for the Apalis modules. http://www.developer.toradex.com Page | 6 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 7: Apalis Evaluation Board Schematics

    High-Definition Multimedia Interface, combines audio and video signal for connecting monitors, TV sets or HDMI Projectors, electrical compatible with DVI-D Inter-Integrated Circuit, two wire interface for connecting low-speed peripherals Page | 7 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 8 Transition-Minimized Differential Signaling, serial high-speed transmitting technology that is used by DVI TMDS and HDMI TVS Diode Transient-Voltage-Suppression Diode, diode that is used to protect interfaces against voltage spikes Page | 8 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 9 Universal Serial Bus, serial interface for internal and external peripherals Positive supply voltage Video Graphics Array, analogue video interface for monitors Table 1: Abbreviations Page | 9 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 10: Interfaces

    Will only be used for this purpose or GPIO. modules; the pins may be used for as yet undefined interfaces Figure 1: Apalis Module Architecture Page | 10 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 11: Standard Interfaces

    2 x USB 3.0, 2 x USB 2.0, 1 x shared host/client USB 2.0 Table 2: Standard Interfaces Page | 11 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 12: Type-Specific Interfaces

    Pin164 Pin24 0.50 1.25 1.50 1.25 Figure 2: Pin numbering schema on the top side of the module Page | 12 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 13: Pci Express

    Please consult the datasheets of such modules to determine if lane reversal is applicable and supported. Page | 13 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 14: Reference Schematics

    RX lanes on the card. Therefore, no additional decoupling capacitors are permitted to be placed on the carrier board in the RX, TX and reference clock lines. Page | 14 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 15 12V rail. In this case, we recommend checking with the PCIe card(s) manufacturer to determine if the +12V supply is required. Page | 15 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 16 Nevertheless, as compatibility between different Apalis modules could Page | 16 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 17 10uF USBH4_SSRX+ GND_PAD Apalis - USB SC4215A 3 of 25 MM70-314-310B1 Figure 9: Mini PCIe card reference schematic Page | 17 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 18 39nF 10uF 100nF 100nF 100nF 100nF VDD0P9_3 VDD0P9_4 CBOT RSVD_22_NC I210 100nF Figure 11: PCIe Device-Down example schematic Page | 18 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 19: Unused Pcie Signals Termination

    The AC coupling capacitors for the RX and TX lines are placed on the Apalis module. Therefore, no additional serial capacitors are needed nor permitted on the carrier board. Page | 19 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 20 Since the AC coupling capacitors for both RX and TX lines are placed on the Apalis Module, no extra serial capacitors are required on the carrier board. Page | 20 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 21 1.5V V_IN V_OUT 40.2K mSATA1_FB 33R@100MHz 100nF 10uF 10uF 10uF 10uF GND_PAD SC4215A Figure 15: mSATA reference schematic Page | 21 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 22: Unused Sata Signals Termination

    The LED output signals ETH1_ACT and ETH1_LINK can be connected directly to the LED of the Ethernet jack with suitable serial resistors. There is no need for additional buffering if the current Page | 22 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 23 Ethernet jack. This reduces the length of the signal traces between the magnetics and jack. Page | 23 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 24 The MDI2 and MDI3 lanes are not used for the 10/100Base-TX interface. These signals can be left unconnected. Page | 24 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 25: Unused Ethernet Signals Termination

    The USB 2.0 data signals do not support polarity inversion; D+ and D- cannot be swapped. Page | 25 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 26 CMOS 3.3V ports USBH_OC# 3.3V Overcurrent input signal, shared with all USB host ports Table 12: USBH4 signals Page | 26 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 27: Reference Schematics

    USB jack. ESD protection diodes should be used for this signal. Page | 27 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 28 If the USBO1 port is used only as high-speed client interface (e.g. if only used as debugging interface), a simplified schematic diagram is necessary. Page | 28 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 29 The following schematic example shows how to use the USBH4 port as a USB 3.0 host interface. As USB 3.0 is backward compatible, this port could also be used as a USB 2.0 host interface. Page | 29 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 30 No series capacitors should be placed in the USB 2.0 data signal lines. Instead of placing a common mode choke to the USB 2.0 data signals, series resistors can be added for reducing the Page | 30 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 31 USB 2.0/1.1 USB 2.0/1.1 Apalis Module Carrier Board USB Cable USB Drive Figure 28: USB 2.0 host block diagram Page | 31 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 32: Unused Usb Signal Termination

    OR add pull-up resistor if port is used as slave. USBO1_VBUS Leave NC if not used USBO1_EN Leave NC if not used Page | 32 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 33: Parallel Rgb Lcd Interface

    (EDID) or as DDC if a converter to VGA or DVI is added. This I2C2_SCL 3.3V interface is shared with the other display interfaces. Table 14: Parallel RGB LCD signals Page | 33 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 34: Color Mapping

    LCD1_G4 LCD1_G5 LCD1_G6 LCD1_G7 LCD1_B0 LCD1_B1 LCD1_B2 LCD1_B3 LCD1_B4 LCD1_B5 LCD1_B6 LCD1_B7 Table 15: Parallel RGB LCD signals Page | 34 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 35: Reference Schematics

    Apalis - System Control FH12-40S-0.5SV(55) 4.7pF 4.7pF 4 of 25 MM70-314-310B1 Figure 30: 24-bit parallel RGB display reference schematic Page | 35 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 36 As there are different LVDS color mappings available, check with your display vendor on how the RGB signals need to be connected to the transmitter. Page | 36 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 37: Unused Parallel Rgb Interface Signal Termination

    (e.g. GPIO). Please check the Apalis module datasheet for more information about GPIO capability and any usage restrictions for the parallel RGB interface. Page | 37 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 38: Lvds Lcd Interface

    As the following figure shows, it is not possible to connect a single channel display to a dual channel output and vice versa. Page | 38 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 39 18bit Display 24bit JEIDA Display 24bit VESA Display Figure 34: Compatibility between LVDS color mapping Page | 39 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 40 VSYNC HSYNC LVDS1_B_TX2+/- LVDS1_A_TX3+/- LVDS1_B_TX3+/- Previous Cycle Current Cycle Next Cycle Figure 37: 24-bit VESA LVDS color mapping Page | 40 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 41: Reference Schematics

    HDCP compatible. Please read the datasheet of the Apalis module for more information about the supported HDMI and DVI protocols. Page | 41 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 42: Hdmi/Dvi Signals

    TDMS signals need to be ESD protected using diodes. The schematic example shows a discrete solution for the level shifting and protection. There are integrated solutions also available. Page | 42 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 43 1nF stitching capacitors are added to the HPD and 100pF stitching capacitors to the CEC signal, close to the module connector. Page | 43 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 44: Analogue Vga

    3.3V (EDID) over DDC. This interface is shared with other display I2C2_SCL 3.3V interfaces Table 19: VGA signals Page | 44 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 45: Reference Schematics

    For more information to the interface, please consult the according datasheet of the Apalis module. Page | 45 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 46: Parallel Camera Interface

    SD1. A module that features only one SD/MMC interface will implement the MMC1 and leave SD1 unconnected. Page | 46 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 47: Sd/Mmc/Sdio Signals

    MMC1_CD# CMOS 3.3V Card detect, add pull-up resistor if card detect is used Table 22: 8bit SD/MMC/SDIO signals Page | 47 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 48 8-bit MMC card slot is compatible with SD cards, the pin numbering is different form the normal SD cards. Page | 48 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 49: Unused Sd/Mmc/Sdio Interface Signal Termination

    In this case, add the external RTC to the I2C1 interface of the module and leave the VCC_BACKUP pin unconnected. Page | 49 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 50: Uart

    CMOS 3.3V Transmitted Data UART4_RXD CMOS 3.3V Received Data UART4_TXD CMOS 3.3V Transmitted Data Table 25: UART Signals Page | 50 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 51: Reference Schematics

    The reference schematic below uses the 9-pin D-sub connector (DE-9). Peripherals might have a different pin-out even if they use as well a DE-9 connector. Page | 51 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 52 Make sure that you check which modes are supported by a specific Apalis module and the peripheral devices. Page | 52 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 53: Unused Uart Signal Termination

    Clock has negative polarity and the data is latched at the negative edge of SCK Table 27: SPI Modes Page | 53 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 54: Spi Signals

    DE-9 connector. Since this is not an official standard, some devices might have a different pin-out. Page | 54 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 55: Unused Can Interface Signal Termination

    The PWM output signals can be used to drive motors, LEDs, robotic servos, fans, etc. It is possible to get an analogue signal with a simple low pass filter. Page | 55 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 56: Unused Pwm Signal Termination

    (star ground philosophy). This avoids conductive coupling between the return current of the headphone output and the microphone input. Page | 56 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 57: Unused Analogue Audio Signal Termination

    For example, the Realtek ALC889 HDA audio codec names its data input signal as SDATA_OUT. This means, the SDATA_OUT needs to be connected to the DAP1_D_OUT signal of the Apalis module. Page | 57 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 58: Unused Digital Audio Interface Signal Termination

    Therefore, level shifters are required. The following reference schematic shows a very simple solution. Some projects may require a galvanically isolated solution Page | 58 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 59: Unused S/Pdif Interface Signal Termination

    C103 Apalis - Touch TSW-103-07-G-D 2.54mm Male 9 of 25 MM70-314-310B1 RCLAMP0504S Figure 54: Touch Interface Reference Schematic Page | 59 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 60: Unused Touch Panel Interface Signal Termination

    Start with a value of 22Ω. Page | 60 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com...

  • Page 61: Unused Clock Output Signal Termination

    2.25.2 Unused GPIO Termination The GPIO signals do not need to be terminated if they are not in use. Page | 61 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 62: Module Recovery

    There is no common process. Therefore, it is necessary to consult the according module datasheet for more information to the hardware requirements. Page | 62 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 63: Power Management

    MICO is the abbreviation for “Module Input, Carrier board Output” while MOCI stands for “Module Output, Carrier board Input” Page | 63 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 64: Power Block Diagram

    In this case, free GPIO can be used to switch off unused peripheral power rails. Page | 64 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 65 RESET_MICO# Shut down request Figure 56: Power states and transitions Page | 65 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 66: Power Sequences

    The lower voltages (e.g. peripheral 3.3V) need to ramp down before the higher ones do (e.g. peripheral 5V). Page | 66 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 67 5V for Perpherals on CB 3.3V for Perpherals on CB RESET_MOCI# RESET_MICO# WAKE1_MICO# >1ms >1ms Figure 59: Reset sequence Page | 67 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 68 3.3V for Perpherals on CB Switched on by a GPIO RESET_MOCI# RESET_MICO# WAKE1_MICO# Figure 61: Resume from suspend sequence Page | 68 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 69: Reference Schematics

    Apalis TK1 and iMX8 in some circumstances can be higher than 5A, the power supply should be designed for higher current in order to be able to host this module. Page | 69 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 70 10uF 12V_UNREG_EN_EN# 100K SI4447DY-T1-E3 POWER_ENABLE_MOCI 12V_UNREG_EN BSS138-7-F 100K 10nF RESET_MOCI# RESET_MOCI# Figure 63: Simple power supply reference schematic Page | 70 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 71: Mechanical And Thermal Consideration

    SnapLock not possible for this spacer alignment post height. Module needs to be screwed down Table 42: Alternate MXM3 connectors Page | 71 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 72: Fixation Of The Module

    MXM SnapLock fixing method can be cost optimized solution also for volume production. Figure 67: SnapLock fixation Page | 72 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 73: Thermal Solution

    Figure 68: Bottom Side of Heat Sink For every type of Toradex Apalis module, an optimized heats sink is available. The heat sink can be used as passive or active cooling solution. Passive means that the natural convection is used to transport the heat from the surface to the air.

  • Page 74: Module Size

    At both edges of the module, ten test pads are available. These pads are used by the module manufacturer for test purposes. Page | 74 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 75: Connector And Mxm Snaplock Land Pattern Requirements

    The reason is that the Apalis module standard does not combine power supply pins to large pads. In addition, the pin numbering is different. Page | 75 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 76: Carrier Board Space Requirements

    If a system does not need a cooling solution and the module is fixed by screwing it down, the required carrier board area becomes smaller. Page | 76 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 77 Components soldered on the top side of the module can be up to a maximum of 3mm in height. 0.50 1.20 2.75 Figure 79: Maximum height of components on module (dimensions in mm) Page | 77 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 78 1mm. Figure 80: Maximum height of carrier board components under module Page | 78 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 79: Appendix A - Physical Pin Definition And Location

    TS_2 USBH3_D- TS_DIFF6- TS_DIFF6+ USBH4_SSRX- USBH4_SSRX+ TS_DIFF7- USBH_OC# TS_DIFF7+ USBH4_D+ TS_3 USBH4_D- TS_DIFF8- TS_DIFF8+ USBH4_SSTX- USBH4_SSTX+ UART TS_DIFF9- Page | 79 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 80 I2C2_SCL VGA1_R I2C1_SDA VGA1_G I2C1_SCL VGA1_B VGA1_HSYNC SPDIF SPDIF1_OUT VGA1_VSYNC SPDIF1_IN HDMI1_CEC HDMI SPI1_CLK HDMI1_TXD2+ SPI1_MISO HDMI1_TXD2- SPI1_MOSI Page | 80 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 81 AAP1_LIN_R Touch AGND AVCC AN1_TSPX AAP1_HP_L AN1_TSMX AAP1_HP_R AN1_TSPY AVCC AN1_TSMY Table 43: Physical pin definition and location Page | 81 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 82 Brand and product names are trademarks or registered trademarks of their respective owners. Specifications are subject to change without notice. Page | 82 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

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