Panasonic SV-MP500VGK Service Manual page 19

Digital audio player
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B
MEMORY BLOCK
D3
MA3J14700L
0.68
0.68
Q2
1.04
2SA1774STL
CHARGEABLE
44
43
42
41
I/O
I/O
I/O
I/O
7
6
5
4
N.C R/B
RE
CE
6
7
8
9
PIN DESCRIPTION
R/B: READY/BUSY OUTPUT
The R/B output indicates the status of the device operation.When low, it indicates that a program, erase or random read operation is in process and returns to high
state upon completion.It is an open drain output and does not float to high-z condition when the chip is deselected or when outputs are disabled.
RE: READ ENABLE
The RE input is the serial data-out control, and when active drives the data onto the I/O bus. Data is valid tREA after the falling edge of RE which also increments
the internal column address counter by one.
CE: CHIP ENABLE
The CE input is the device selection control. When the device is in the Busy state, CE high is ignored, and the device does not return to standby mode in program
or erase opertion. Regarding CE control during read operation, refer to "Page read" section of Device operation.
CLE: COMMAND LATCH ENABLE
The CLE input controls the activating path for commands sent to the command register. When active high, commands are latched into the command register through
the I/O ports on the rising edge of the WE signal.
ALE: ADDRESS LATCH ENABLE
The ALE input controls the activating path for address to the internal address registers.Addresses are latched on the rising edge of WE with ALE high.
WE: WRITE ENABLE
The WE input controls writes to the I/O port. Commands, address and data are latched on the rising edge of the WE pulse.
WP: WRITE PROTECT
The WP pin provides inadvertent write/erase protection during power transitions. The internal high voltage generator is reset when the WP pin is active low.
D9
0.69
1.05
Q3
0.69
B1ADMD000012
CHARGEABLE
Chargeable Control Pin
37
36
32
Vcc
Vss
I/O
3
IC2
FLASH MEMORY
Vcc Vss
CLE ALE WE
12
13
16
17
SV-MP500VGK / SV-MP500VGH / SV-MP500VGC / SV-MP500VGD / SV-MP500VGN
(TO MAIN CIRCUIT CN1)
CN5
15
16
5V
14
17
13
18
12
19
Battery
11
20
10
21
9
22
8
23
7
24
6
25
5
26
4
27
3
28
2
29
1
30
30
29
31
PIN DESCRIPTION
I/O
I/O
I/O
I/O 0 ~ I/O7:
2
1
0
DATA INPUTS/OUTPUTS
The I/O pins are used to input
command,address and data, and
to output data during read operations.
The I/O pins float to high-z when the
chip is deselected or when the
outputs are disabled.
Vcc:
POWER
Vcc is the power supply for device.
Vss: GROUND
WP
18
19
SV-MP500V(GK)(GH)(GC)(GD)(GN) BLOCK DIAGRAM
19
2.8V
KEY

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