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MAJOR IC INTERNAL BLOCK DIAGRAM AND PIN
IC301 (SSI3723) : RF Signal Processing for CD/DVD
It amplifies or equalize the RF signal from Pick-up, and generate the TE (Tracking Error) and FE
(Focus Error) signal for Servo respectively.
The TE signal uses the DPD (Differential Phase Detect) method for DVD and 3 Beam method for CD.
DVD FE = (A+C) - (B+D)
CD FE = F - E
Block Diagram
DVDRFP
DVDRFN
RFSIN
A
CD_A
B
CD_B
C
CD_C
D
CD_D
CD_E
CD_F
A2
B2
C2
D2
DVD/PD
CDPD
DESCRIPTION
ATT
MUX
4
4. SIGR b7-4
2
ATT
5. RFCR b7-6
INPUT IMP
4. SIGR b3
SEL
INPUT SEL
w/LPF
A
GCA
w/LPF
MUX
B
GCA
w/LPF
C
GCA
D
w/LPF
GCA
4. SIGR b2-0
12dB is added
@high gain mode
(16. CDR b4=1)
GCA
+
GCA
+
+
GCA
+
GCA
3
4. SIGR b2-0
1. PDCR b3
CD/DVD
6dB is added
@high gain mode
(16. CDR b4=1)
GCA
+/- 4dB
GCA
GCA
3
4
5. RFCR b2-0
8. TRCR2 b3-0
12dB is added
@high gain mode
(16. CDR b4=1)
Comp
EQ
GCA
EQ
GCA
GCA
EQ
GCA
EQ
VC
3
3
5. RFCR b2-0
7. TRCR b6
8. TRCR2 b6-4
15. CCR b5
16. CDR b3
APC SEL
LD H/L
DVD/CD
Dual APC
AGCO
12. MRCR2 b6-5
2. FCCR b7-0
3. FBCR b6-0
PROGRAMMABLE
AGC
IMPUT
EQUALIZER
BIAS
FILTER
DIFFERENTIATOR
2
5. RFCR b5-4
INPUT IMP SEL
AGCO
SSOUT
+
Clamp
-
& Env
2
Inv.
13. CAR b1-0
2
Level
13. CAR b3-2
DAC
SIGDET
B+D
+
+
SUM
+/- 4dB
Amp
+
GCA
+
A+C
4
6. FOCR b7-4
70kHz
+
LPF
+
A+D
+
+
B+C
-
TOPHOLD
+
6dB
Amp
TOPHOLD
12dB is added
@high gain mode
(16. CDR b4=1)
18. CFR b2-0
+3dB
-
18. CFR b3
+
PHASE
+
DETECTOR
+
1. PDCR b3
PHASE
CD/DVD
DETECTOR
7. TRCR b7
12. MRCR2 b1-0
15. CCR b6 Disk Det High Gain
Mirr gain
16. CDR b7
12. MRCR2 b3-2
Mirro Clamp ON
Sink current
11. MRCR b1-0
11. MRCR b3-2
2
Input Imp
Mirr LPF
Pll
2
BOTTOM
ENVELOPE
INPUT
BUFF
15. CCR b7
MUX
2
DISK DET
3. FBCR b7
OUTPUT INHIBIT
FULL WAVE
RECTIFIER
17. CER b6
CHARGE
FAST Attack
17. CER b5
SLOW decay
+
-
15. CCR-b4-0
5
+/- 6dB, 4bit
70kHz
Offset
-
LPF
cansel
+
5
6. FOCR b3-0
10. PIOR b4-0
Offset
cancel
TOPHOLD
9. CTCR b7
BCA DET
2
14. CBR b3-2
DAC
Buff
4
-6dB @normal
9. CTCR b3-0
Offset
GCA
cancel
+/- 6dB, 4bit
5
PI
17. CER b4-0
FE
TE
CE
V25
V125
V25/3
10. PIOR b7-5
3
LPF
CE-ATT
ATT
Pol sel.
Buff (-12dB)
14. CBR b5-4
CEPOL
16. CDR b5
SUB
MUX
LPF
OFFSET
Cancel
6
18. CFR b7-5
18. CFR b4
7. TRCR b5-0
8. TRCR2 b7
CEFDB
CP/CN
for PI output ref.
Low Imp
V25/3
12. MRCR2 b4 MIR ONLVL
15. CCR b7 DISK DET
CONTROL
Signals
To each block
@CCR b7 Disk Det=1
11. MRCR b7-5
12. MRCR2 b7
Comp offset & hys
2
MIRR
COMP
PEAK/
16. CDR b6
BOTTOM
LINKEN
HOLD
11. MRCR b4
internal FDCHG
5. RFCR b3
AGC HOLO
AGC
PUMP
BYP
RX
GCA
FE
4
PII
PI
TPH
COMP
SEL
-
DFT
+
2
14. CBR b1-0
RFDC
CE
MNTR
Control
MNTR
3
LCP
LCN
2
SEL
HLDEN
CP
CN
TE
GCA
TE
RST
for TE, FE & CE
3
output ref.
16. CDR b1
V25/2
V125
V25
VCI for servo input
VC
VC=VPB/2
16. CDR b2
SDEN
SERIAL PORT
REGISTER
SDATA
SCLK
V33
V33 for Output buff
23
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