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Changes for new Motherboard by P 6 P Design
C o n n e c t
Break
(17)
Tie pin 112 of IC #6 to pin #5 of IC #8
(18)
Tie the output of IC 118 pin 6 to IC #47 pins 13, 2, 4 and
(13)
IC #'s 35 & 36 pins 13, 2, 10
On parts layout sheet IC #47
(20)
for 7408
Tie pin 9, IC 847 to pin 5, IC 835
(21)
Tie
junction
(22)
Data Bus Line @3 should be tied to the buffer IC i/29, pin 8.
(23)
Instead it is tied to pin 8 of IC 1130
Connect
(24)
Connect pin 10,
(25)
IC 111 reverse
(26)
input and pin 2
IC #39 pins 2 &
(27)
Data Bus Line @o
(28)
of IC's 42, 44, 46, 48 and 50
Pin 3 of IC #44 has been falsly tied to pin 7 of same XC.
(29)
Schematic calls for IC #42 to be tied that way
Data Bus '$1
(30)
44, 46, 48 and 50
Tie R114 to collector of 946
(31)
pin 5 should be connected to IC i/42
(32)
IC i/SO pin 10
Pin
(33)
(34)
(35)
(36)
to C7
VCC and
ground
IC i/25;
the etchwork
is the output
3 should be tied to IC #15, pin 9
not
is not connected.
should be tied to pin 115 of IC 1121.
should not be tied to pin 10 of IC 1121.
incorrectly.
should be tied to pin
Pin ii10 of IC 1117
is a 7405, schematic calls
to
to pin 3, IC 41
on pins 1 & 2, pin 1 is the
connected.
Tie IC 1129 pin 12 to
Tie IC 129 pin 2 to pin 3 of IC's
to drive LED decimal points
should not be tied to pin
(Page
2)
pin 10, and not
pin 2
Pin
and pin
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