Analog Output Register Group; Ao Configuration Register; Table 3-8. Channel Assignments - National Instruments AT-MIO E Series Programmer's Manual

Chapter 3 Register Map and Descriptions — AO Configuration Register
Chan<3..0>
xxxx

Analog Output Register Group

The four registers making up the Analog Output Register Group access the two analog output
channels, the analog output FIFO, and the analog output configuration. Data can be
transferred to the DACs in one of two ways. Data can be directly sent to the DACs from the
host computer, or buffered from the host by the DAC data FIFO.

AO Configuration Register

The AO Configuration Register contains 5 bits that control the AT E Series analog output
configuration. The contents of this register are cleared upon power up and after a reset
condition.
Address:
Type:
Word Size:
Bit Map:
15 14
Reserved Reserved
7 6
Reserved Reserved
Bit
15–9,
7–4
8
AT-MIO E Series RLPM

Table 3-8. Channel Assignments

Type<2..0> = GHOST
Used to preserve timing for multirate sampling. No acquisition is
performed for this scan entry.
Base address + 16 (hex)
Write-only
16-bit
13 12
Reserved Reserved
5 4
Reserved Reserved
Name Description
Reserved Reserved—Always write 0 to these bits.
DACSel DAC Select—This bit indicates which DAC is the
destination for the configuration bits in this register.
DAC0 will be selected when this bit is cleared, and DAC1
will be selected when set.
Purpose
11 10
Reserved Reserved
3 2
GroundRef ExtRef
3-16
9
Reserved DACSel
1
ReGlitch BipDac
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