Benewake TF-Luna Product Manual page 13

ID: Indicates how to parse the payload data.
Payload: Payload data segment, optional.
Checksum: The lower 8 bytes of the sum from Head to Payload.
Please check Appendix II Serial communication protocol for more information.
Note: TF-Luna does not enable checksum check for sending data frames by default, that is, the
Checksum at the end of the sending frame can be filled with any value.. Thus, ANY value is acceptable
on the Checksum byte, unless checking of those bytes is required. Please check "Enable/disable
checksum comparison ID_FRAME_CHECKSUM_EN=0x08" in Appendix II Serial communication
protocol to enable the feature.
The instruction makes change immediately after sending, but the current setting is not saved and
will be lost after reboot. User must use "Save current setting ID_SAVE_SETTINGS=0x11" to save the
change. The full save-current-setting hexadecimal sequence is 5A 04 11 00 in this case.
6.3 I2C Communication
When pin 5 is connected to ground, TF-Luna enters I2C mode, then its pin 2 is used as SDA data
and pin 3 is the SCL clock sending data. TF-Luna supports up to 400kps clock speed as slave machine
and its default address is 0x10. For more information about I2C register table refer to Appendix III I2C
register table.
Note: In this document, the address of I2C slave device is a 7-bit value with value range [0x08,
0x77] ([0, 119] in decimal). For the first byte after I2C releases a start signal, the 7-bit address should be
shifted leftward for one bit (i.e. multiplied with 2), and then filled with the read-write sign on the
lowest bit. For TF-Luna, the default address of slave device is 0x10, the address for write operations is
0x20, and the address for read operations is 0x21.
Write register timing:
Start Slave Addr W Ack
Read register timing:
Start Slave Addr W Ack
Start Slave Addr R
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SJ-PM-TF-Luna A05 Product Manual
Register Addr Ack
Register Addr Ack
Ack Data1 Ack ...
Data1 Ack ... DataN Ack
Stop
DataN Nack Stop
Benewake (Beijing) Co. Ltd.
Stop