Low Level Inhibit; Overload Protection Clod Indication - Racal Instruments 9916 Workshop Manual

Uhf frequency meter
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4.7
The potential at C53 is appl ied via R63 and IC25b to the base of Q1 O. An
increase of input signal amplitude causes an increase in potential at Q10 emitter.
4.8
The P1N diodes of the attenuator exhibit an impedance which is inversely
proportional to the current carried. As the AGC potential increases D14 current
increases, and the potential at the D12/D13 junction increases. This reduces the current
carried by D12 and D13, which, in turn, increases the potential at the D1l/D12 and
D13/D15 junctions and increases the current in Dl1 and D15. The overall effect is an
.increase in the impedance of the series attenuator arm and a decrease in impedance of the
shunt arms.
.
4.9
The AGC voltage is available at a two pin outlet on the rear panel to provide
an indication of relative amplitude for 'A' Channel signals.
-Low Level Inhibit
.10
The output of the AGC detector is applied to IC25q!1. This is an operational
ampl ifier connected as a Schmitt trigger. The triggering level is set by
adjusting
R64.
If the input signal level is too low to give stable counting
lC25q112
is at
logic
10',
and IC9b, part of the signal selection system described in paragraph 4.17, is
inhibited.
Overload Protection and Indication
4.11
Signals applied to the 'A' Channel input are passed to the peak to peak detector
C35, D9, D10 and C37.
Increasing signal amp! itude resul ts in the detector
-output making IC29/2 more negative via the potential divider R39/R40.
4.12
IC29 is a Schmitt trigger which triggers when pin 2 goes more negative than
pin 3. This occurs when the input voltage is approximately 5 volts r.m.s., and
de-energises RLA to isolate the ampl ifier from the input. At the same time
08
is switched
on and lights
LPl to give warning that overload has occurred.
;' Channel Amplifier
'4.13
The signal to be measured is applied to the front panel BNC socket SK50, and
passes, via Cl00, R200 and the Cl/R3 combination, to the high impedanc~ FET
first stage 01. The gate of 01 is protected by R3, D1 and the gate! channel 'diode .
4.14
The output at the source of 01 is passed via the
~mitter
follower 02 to the AGC
attenuator D2/D3.
The attenuator output is amplified in 1C30, buffered by Q4,
-and applied to the Schmitt trigger IC21 c. The signal,from IC21 c passes via a line receiver
[C21b, which is used as a gate, to 05 and IC8b. The output of IC21b is also taken to the
Low Frequency Multiplier (if fitted) and then 'to IC9a.
The LF Multiplier is described
In
-paragraph 4.71.
IC8b and IC9a are part of the signal selection system described in
paragraph 4. 17.
4-2
9916 Vol. 2

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