Terminals Description - Toyota CQ-TS6670LC Service Manual

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CQ-TS6670LC / CQ-TS6671LC

6 TERMINALS DESCRIPTION

6.1.
Main Block
IC600: C2DBLK000110
No. Port
Descriptions
1
AVDD
Standard
converter
2
GND
Ground Terminal
3
ILL-DET
H: Illumination off
L: Illumination on
4
(PORT)
H: LAN-MUTE off (normal)
L:LAN-MUTE on (DSP-MUTE)
5
VDD
6
MUTE
H: MUTE on L: MUTE off
ON/OFF
7
NC
No Connection
8
IC/
FLMD0
9
VDDO
10
REGCPU Regulator output stable capacity
connection
regulator stops
11
GND
Ground
12
X1
Oscillation
4.718MHz
13
X2
Oscillation
4.718MHz
14
RESET
H: Normal L: Reset
15
XT1
Oscillation (sub) 32.768kHz
16
NC
No connection
17
NC
No connection
18
Lo-BAT.
H:+B, 3.1V or more
RESET
L: +B, less than 3.1V
19
SW1
H: SW1 on L: SW1 off
20
DRST
On-chip debug
21
PWR
H: PWR off L: PWR on
22
CD-SOM CD
communication
23
CD-SIM
CD
communication
H: data "1" L: data "0"
24
CD-
CD
SCKM
communication clock
25
SIYOU1
Specification 1
26
LOAD
(LOAD)
27
SW3
H: SW3 on L: SW3 off
28
BEEP
Beep output terminal
29
SPD
Input from the vehicle pulse
1 pulse: 1/2548km
30
SIYOU2
Specification 2
31
TX +
AVC-LAN data input
32
TX -
AVC-LAN data output
33
GND
GND for I/O port and combined
function
34
VDD
Postive power supply for I/O port
and combined function
35
HIT-
HIT64 data output terminal
SOUT
36
HIT SIN
HIT64 data input
37
NC
No connection
38
ILL-ON
H: Ill on L: Ill off
39
DDI
On-chip debug terminal
40
DDO
On-chip debug terminal
41
DCK
On-chip debug terminal
42
DMS
On-chip debug terminal
43
DSP-SDA DSP (SAF7730HV) (H/L)
44
DSP-SCL DSP (SAF7730HV) clock signal
output (H/L)
45
WP
H: E2PROM write protect (in)
L: E2PROM is writing (out)
I/O FM AM CD
voltage
for
A/D
-
3.4 3.4 3.4
-
I
3.4 3.4 3.4
I
-
-
3.4 3.4 3.4
O
-
-
-
-
-
3.4 3.4 3.4
-
2.5 2.5 2.6
and
power
when
-
(main
clock)
I
1.2 1.2 1.2
(main
clock)
O 1.2 1.2 1.2
I
3.3 3.4 3.4
I
-
-
I
3.3 3.3 3.4
I
I
I
3.3 3.3 3.3
(IDC)
deck
serial
I
(IDC)
deck
serial
O
(IDC)
deck
serial
O
-
I
1.7 1.7 1.7
I
O
I
-
O
I
-
-
3.4 3.4 3.4
O 3.5 3.5 3.5
I
4.6 4.7 4.6
-
O
O
O
O
O
I/O 2.7 2.7 2.7
O 2.4 2.4 2.4
I/O 3.1 3.1 3.1
46
LCD-DET H: Normal L: S1D15605 sudden
47
LCD-
RESET
48
LCD-CS2 S1D15605 chip select terminal 2 O 4.5 4.5 4.5
49
LCD-CS1 S1D15605 chip select terminal 1 O 4.5 4.5 4.5
50
LCD-A0
0
0
0
51
LCD-
DATA
0
0
0
52
LCD-SCL S1D15605 clock output
53
RDS-
DATA
0
0
0
54
HIT-
HBRQ
-
-
-
55
RDS-CL
0
0
0
56
HIT-DE
57
NC
58
ACC-DET H: Acc on L: Acc off
59
RESET_
DSP
0
0
0
60
DSP_
INIT
61
+B-DET
62
RDS-
MUTE
63
L/R
-
-
-
64
NC
-
-
-
65
DIV-SW
-
-
-
66
TEL-
MUTE
67
CD-
0
0
3.4
RESET
0
0
0
68
CD-ON
0
0
1.9
69
GND
(BVSS)
0
0
2.6
70
VDD
(BVDD)
0
0
3.4
71
NC
72
NC
-
-
-
73
BRIGHT-
IND
0
0
3.3
74
NC
0
0
0
75
CD-EJ
0
0
0
76
FLMD1
77
KEY-D0
-
-
-
78
KEY-D1
0
0
0
79
KEY-D2
0
0
0
80
KEY-D3
0
0
0
81
KEY-D4
82
KEY-S3
83
KEY-S2
84
PW-
STBY2
85
PW-
STBY
-
-
-
86
PW-
0
0
0
LATCH
0
0
0
87
PW-SCK Clock
0
0
0
0
0
0
88
PW-
DATA
0
0
0
89
KEY-S1
90
KEY-S0
91
MODE-A Mode encoder input terminal A
92
MODE-B Mode encoder input terminal B
6
drop
H: Normal L: LCD reset
S1D15605
data;
command
switch output
S1D15605 data output/input
RDS demodulator data input
HIT64 BRQ terminal H: on L: off
RDS demodulator clock input
H: Sending data
L: Not sending data
No connection
H: DSP normal L: DSP reset
H: INIT complete
L: INIT incomplete
H: +B on L: +B off
H: RDSMUTE on
L: RDSMUTE off
H: Left handle L: Right handle
No connection
H: Main is fixed L: Diver operation
H: VOL operation is valid
L: VOL operation is invalid
H: Normal L: Reset
H:
CD
deck
microcomputer
communication is possible
L: Not possible
(BVSS) Ground for bus interface
Positive power supply for bus
interface
No connection
No connection
-
No connection
H: CD-EJ off L: CD-EJ on
-
Key matrix input terminal D0
Key matrix input terminal D1
Key matrix input terminal D2
Key matrix input terminal D3
Key matrix input terminal D4
Key matrix output terminal S3
Key matrix output terminal S2
STBY2 output for power IC
(BD4902) No reversing
STBY
output
for
power
IC
(BD4902) No reversing
Latch signal output for power IC
(BD4902) No reversing
output
for
power
IC
(BD4902) No reversing
Data
output
for
power
IC
(BD4902) No reversing
Key matrix output terminal S1
Key matrix output terminal S0
I
4.5 4.5 4.5
O 4.5 4.5 4.5
O 4.5 4.5 4.5
O
0
0
0
O 3.4 3.4 3.4
I
1.5 3.3 1.7
O 3.4 3.4 3.4
I
1.6 3.3 1.6
O
0
0
0
-
-
-
-
I
3.4 3.4 3.4
O 3.4 3.4 3.4
I
3.3 3.3 3.3
I
3.4 3.4 3.4
O
0
0
0
I
3.1 3.1 3.1
-
-
-
-
I
0
0
0
I
3.4 3.4 3.4
O 3.4 3.4 3.4
O
0
0
3.4
-
0
0
0
-
3.4 3.4 3.4
-
-
-
-
-
-
-
-
O
-
-
-
-
-
-
-
I
3.3 3.3 3.3
O
0
0
0
I
0
0
0
I
0
0
0
I
0
0
0
I
0
0
0
I
0
0
0
O
0
0
0
O
0
0
0
O 3.4 3.4 3.4
O 3.4 3.4 3.4
O 3.4 3.4 3.4
O
0
0
0
O
0
0
0
O
0
0
0
O
0
0
0
I
3.1 3.1 3.2
I
3.1 3.1 3.2

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