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A
B
C
9
A_CADDR<25..0>
31.8A>
IN
8
7
6
A_DBUS<15..0>
31.8A>
IN
5
4
-ACD1
31.7A>
IN
-ACD2
31.1A>
IN
3
C137
C138
220PF
220PF
10%
10%
50V
50V
1005
1005
2
GND
NEAR PCI1451
1
0
_______
A
B
C
D
E
F
PCI1420GHK(2/2)
J19
0
A_A0/A_CAD26
1
K14
A_A1/A_CAD25
2
K15
A_A2/A_CAD24
3
K19
A_A3/A_CAD23
L15
4
A_A4/A_CAD22
5
L17
A_A5/A_CAD21
6
L19
A_A6/A_CAD20
M15
7
A_A7/A_CAD18
8
W16
A_A8/A_CCBE1#
9
R14
A_A9/A_CAD14
W14
10
A_A10/A_CAD9
11
P14
A_A11/A_CAD12
12
N18
A_A12/A_CCBE2#
13
R17
A_A13/A_CPAR
N14
14
A_A14/A_CPERR#
15
M14
75
5%
1/16W
A_A15/A_CIRDY#
16
1
2
P18
A_A16/A_CCLK
U15
17
R9
1005
A_A17/A_CAD16
18
T19
A_A18
19
P15
A_A19/A_CBLOCK#
20
R18
A_A20/A_CSTOP#
21
P17
A_A21/A_CDEVSEL#
22
P19
A_A22/A_CTRDY#
23
N17
A_A23/A_CFRAME#
N19
24
A_A24/A_CAD17
25
M18
A_A25/A_CAD19
0
H14
A_D0/A_CAD27
1
G18
A_D1/A_CAD29
2
G14
A_D2
3
U11
A_D3/A_CAD0
R11
4
A_D4/A_CAD1
5
U12
A_D5/A_CAD3
6
R12
A_D6/A_CAD5
7
V13
A_D7/A_CAD7
8
H15
A_D8/A_CAD28
9
G17
A_D9/A_CAD30
10
F19
A_D10/A_CAD31
P11
11
A_D11/A_CAD2
12
V12
A_D12/A_CAD4
13
P12
A_D13/A_CAD6
W13
14
A_D14
15
U13
A_D15/A_CAD8
-ACHSTS
H19
31.2A>
IN
A_STSCHG#
-ASPKR
J15
31.2A>
IN
A_SPKR#/CAUDIO
V11
A_CD1#/A_CCD1#
H17
A_CD2#/A_CCD2#
-ACE1
P13
31.6A>
IN
A_CE1#/A_CCBE0#
-ACE2
R13
31.6A>
IN
A_CE2#/A_CAD10
-AINPACK
L14
31.2A>
IN
-AIOR
A_INPACK#
W15
31.5A>
IN
A_IORD#/A_CAD13
-AIOW
V15
31.5A>
IN
A_IOWR#/A_CAD15
-A-OE
U14
31.6A>
IN
A_OE#/A_CAD11
-AIRQ
J17
31.4A>
IN
A_IREQ#/CINT#
-AREG
K17
31.2A>
IN
A_REG#/A_CCBE3#
ARESET
L18
31.3A>
IN
A_RESET/A_CRST#
-AWAIT
J14
31.3A>
IN
-A-WE
A_WAIT#/A_CSERR#
R19
31.4A>
IN
A_WE#/A_CGNT#
-ACARD16
H18
31.1A>
IN
A_IOIS16#
AVS1
J18
31.5A>
IN
A_VS1#/A_CVS1
AVS2
M19
31.3A>
IN
A_VS2#/A_CVS2
D
E
F
G
H
J
K
U46
R8
0
B_A0/B_CAD26
W7
1
B_A1/B_CAD25
V7
2
B_A2/B_CAD24
W6
3
B_A3/B_CAD23
V6
4
B_A4/B_CAD22
U6
5
B_A5/B_CAD21
V5
6
B_A6/B_CAD20
U5
7
B_A7/B_CAD18
N1
8
B_A8/B_CCBE1#
M3
9
B_A9/B_CAD14
L1
10
B_A10/B_CAD9
M1
11
B_A11/B_CAD12
T1
12
B_A12/B_CCBE2#
N3
13
B_A13/B_CPAR
P1
14
B_A14/B_CPERR#
P5
15
75
5%
1/16W
B_A15/B_CIRDY#
P6
1
2
16
B_A16/B_CCLK
M6
17
R107
1005
B_A17/B_CAD16
N2
18
B_A18
N6
19
B_A19/B_CBLOCK#
N5
20
B_A20/B_CSTOP#
R1
21
B_A21/B_CDEVSEL#
R2
22
B_A22/B_CTRDY#
R3
23
B_A23/B_CFRAME#
W4
24
B_A24/B_CAD17
R6
25
B_A25/B_CAD19
W10
0
B_D0/B_CAD27
U10
1
B_D1/B_CAD29
P10
2
B_D2
H2
3
B_D3/B_CAD0
J1
4
B_D4/B_CAD1
J3
5
B_D5/B_CAD3
K1
6
B_D6/B_CAD5
K3
7
B_D7/B_CAD7
V10
8
B_D8/B_CAD28
R10
9
B_D9/B_CAD30
W11
10
B_D10/B_CAD31
H1
11
B_D11/B_CAD2
J2
12
B_D12/B_CAD4
J6
13
B_D13/B_CAD6
K2
14
B_D14
K5
15
B_D15/B_CAD8
-BCHSTS
V9
B_STSCHG#
-BSPKR
W9
B_SPKR#/CAUDIO
H3
B_CD1#/B_CCD1#
R9
B_CD2#/B_CCD2#
-BCE1
K6
B_CE1#/B_CCBE0#
-BCE2
L2
B_CE2#/B_CAD10
-BINPACK
R7
B_INPACK#
-BIOR
L5
B_IORD#/B_CAD13
-BIOW
M2
B_IOWR#/B_CAD15
-B-OE
L6
B_OE#/B_CAD11
-BIRQ
V8
B_IREQ#/CINT#
-BREG
P8
B_REG#/B_CCBE3#
BRESET
W5
B_RESET/B_CRST#
-BWAIT
W8
B_WAIT#/B_CSERR#
-B-WE
P3
B_WE#/B_CGNT#
-BCARD16
U9
B_IOIS16#
BVS1
U8
B_VS1#/B_CVS1
BVS2
P7
B_VS2#/B_CVS2
G
H
J
K
L
M
N
DATE
EC NO.
OCT/02/01 VER 0.86
B_CADDR<25..0>
31.8P>
IN
* A_CADDR16,B_CADDR16
33MHZ CLOCK LINE IN CARDBUS MODE
B_DBUS<15..0>
31.8P>
IN
31.2Q>
IN
31.2Q>
IN
-BCD1
31.7N>
IN
-BCD2
31.0L>
IN
31.6N>
IN
31.6N>
IN
31.2Q>
IN
31.5N>
IN
31.5N>
IN
31.6N>
C140
C139
IN
31.4N>
220PF
220PF
IN
31.2Q>
10%
10%
IN
31.3N>
50V
50V
IN
31.3Q>
1005
1005
IN
31.4N>
IN
31.1N>
IN
31.5N>
IN
31.3N>
GND
IN
NEAR PCI1451
Y.I
10/02/01
DESIGNER
CHECKED
APPROVED
CLASS
THIS
DOCUMENT
IS
THE PROPERTY
IBM
ITS
USE IS AUTHORIZED ONLY
RESPONDING TO A REQUEST FOR QUOTATION
OR
FOR
THE PERFORMANCE OF WORK
IBM.
ALL QUESTIONS MUST BE REFERRED
TO THE IBM PURCHASING DEPARTMENT.
L
M
N
P
Q
PART NO.
_______
9
DEVELOPMENT NO.
Q/M
/
29
70
8
7
6
5
4
3
2
1
PART NO.
_______
TITLE
TORONTO-4.5
CARD BUS
PCI1420GHK(2/2)
0
OF
FOR
FOR
P
Q
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