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Microamplifier Series – Lead
Preamp Circuit Description
GK Document # 450-0063-A
Preamp Board #'s- 206-0063-E & 206-0073-D
Models #'s ML260S, ML260E, ML120S, ML120E-all options
1/28/91 Rev. 9/9/99-SW
Introduction
The following is a brief description of the operation of the circuits found in the ML Series amplifiers. It should provide enough information to
get a basic understanding of the circuits in order to perform any repairs. When calling attention to a component with the use of a reference
designator, the r.d. will be that of the E preamp board. If the two boards (E & S) share the same number then only one number will be shown.
However, if they are different, the S reference designator will be shown in these brackets [ ].
Input Stage
The input stage is very low noise and is built around the JFET-Q9 (J113). In the "clean" mode it has a gain of just over four and should swing
approximately 22 Vp-p. The 1K trimpot, R5, is used to adjust the DC bias voltage at the source of Q9 which in turn sets the output (drain of
Q9) for the maximum voltage swing. U1 is a unity gain buffer used to drive both the lead and clean channel circuitry. Its output (pin 1)
should be about 2V DC for the maximum possible voltage swing out of Q9. When the channel switch is engaged, the capacitor C15 [C16] is
switched into the circuit. Its presence increases the input gain to nearly six at 100Hz.
Channel Switching
The Channel Select switch, S1, selects the clean channel in the 'out' position and the lead channel in the 'in' position. When out, the C/L line
is grounded and the clean LED lights. This puts a –14Vdc signal on the collector of Q30 [Q26], which in turn shuts off Q20 [Q19]. This gives
the lower gain condition at the input stage. The –14Vdc at the base of Q36 [Q35] turns on the FET Q40 [Q36], grounding out the signal
through the lead channel so it won't bleed through. (The 4.7K resistor, R35 [R41], also keeps the FET on for less noise in the lead channel
when there is nothing plugged in at the input jack.) The C/L line also controls the analog switch control pin, U6-2 [U3-2], that switches
between the clean and lead circuitry. A low voltage there selects pin 4 and clean voicing. When S1 is in, the C/L line gets pulled up to 2Vdc
and selects the switch at pin 3 of U6 [U3] for the lead channel output. This also lights the lead LED and puts a 0.63Vdc signal at the collector
of Q30 [Q26]. This puts the FETs in the opposite state, giving higher gain at the input and letting the signal go through the lead channel.
When the footswitch is inserted, the channel select switch needs to be in the 'in' position so that it is floating. This allows the footswitch to
perform in the same way as the front panel switch did.
Lead Channel
The overdrive of the lead channel is generated by the high gain of three FETs. The first stage, with Q50 [Q48], has a gain of 9 at 100Hz and a
fixed bias of about 7.3Vdc. The next stage, with Q67 [Q59], has a gain of 10 (adjustable with R68 [R70]) and has a bias set around 4.2Vdc
with R66 [R63]. The stage, Q78 [Q69], has a gain of 8 and a bias set around 6Vdc with R87 [R86]. The signal at each of those stages should
clip softly and therefore have rounded rather than sharp corners when driven into the rails. The gain throughout all these stages can be
controlled by the Dual Gain pot, R38 [R29], and the Boost pot, R18 [R17]. The boost pot is normally in the circuit with a 15Vdc signal at U2-
2 (2Vdc with a footswitch), the switch between pin 3 and pin 7 is selected. But it can be bypassed when the control pin U2-2 becomes
grounded via the footswitch and selects the switch between pins 4 and 6. Finally, the Shape control pot, R74 [R61], provides a variable
midrange cut just before the lead channel Master pot.
Clean Channel
The first stage of the clean channel is a notch filter leading into an op-amp, U1 pins 5-7, with a gain of 3. This buffers the signal before it goes
to the clean volume control (assuming the compressor is not selected) and into the FET stage. Q121 [Q87] provides a gain of about 20 and its
drain is biased at about 7.6Vdc. When the signal hits the rails, it should again clip softly as described above.
Compressor (ML-E only)
The compressor circuit provides 2:1 compression and consists of half of U4 and half of U5. Correct operation of a compressor means that as
the input signal level increases, the gain of a circuit decreases, so that a change in level at the input doesn't result in an identical change in level
at the output. Therefore, for a 2:1 compressor, if the input increases by 6dB, the output only increases by 3dB. The attack and release voltages
are set by C106 (335). There is a 1.8Vdc reference voltage that appears at pins 2,3,5,6, and 8 of U5 and pins 2 and 3 at U4. The voltage at U5/
1 is a rectified DC voltage and increases with increasing
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