NorthStar HORIZON Manual page 68

Each serial interface can be configured for RS-232 or
current loop operation. TTL to RS-232 level shifting of
interface signals is performed by RS-232 drivers 3B and 4B.
RS-232 to TTL levels are shifted by RS-232 receivers 3C and
4C. The RS-232 interface signals can be configured onto
each 2S-pin interface connector so that each serial
interface can communicate with either a modem or a serial
terminal with the headers at locations 3D and 4D. For
current loop operation, the RS-232 driver chip is replaced
by a header containing a current loop driver. Resistors
R16, R17, R24, and R2S provide current source and sink
capabilities for current loop operation.
Provision for synchronous mode communic3tion has been made
in the serial interfaces. Baud rate clocks required for
synchronous communication can be transmitted with the RS-232
drivers (lB) and received with the RS-232 receiver (lC) by
properly configuring the Left Special Clock header (10) 3nd
the Right Special Clock header (2C). Parts for the
synchronous logic are not included with the standard
HORIZON. Synchronous logic parts for both serial interfaces
are included with the Second Serial Interface option.
4. Parallel I/O Interface: Optional 8-Bit parallel ports are
interfaced to the internal data bus by octal latches, Ie
type 74LS373, at locations 9A (input) and 8A (output).
These are gated to and from the internal bus by signals PI-
to-U/ and LD-PO, respectively. Configuration of the
Parallel Port Control header at location 9C allows
specification of the conditions which enable the data output
latch, load the data input latch, clock the input and output
control flip-flops P-O-FLG and P-I-FLG, and drive the SPARE
conditions to the parallel interface.
5. Control/Status Byte: When enabled by the port decoder, the
motherboard status bytE' is gated onto the internal data bus
by the octal buffer at SA. In addition to the flags
hardwired on the PC board, there are also three spare status
bits which may be defined by the user when JI-J3 are cut and
the lines are wired.
Various on-board control functions are performed by control
decoder chip 9B, a 74LS138 one-af-eight dec@der, and the
74LS2S9 addressable latch at 8B. These functions include
arming and disarming the on-board interrupt request
conditions, and resetting the various flags.
6. Interrupt control: Various interrupts can be generated for
the on-board serial and parallel I/O interface conditions,
as well as the real-time clock. These interrupt request
conditions are turned on and off by open collector gates 2A,
2B, and 7B, which furnish signals to the interrupt
configuration header at lAo The user may then route the
North Star HORIZON Computer
68