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Cypress CY15FRAMKIT-002 User Manual

Excelon ultra qspi f-ram development kit
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CY15FRAMKIT-002
TM
Excelon
Ultra QSPI F-RAM Development
Kit User Guide
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
www.cypress.com

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Summary of Contents for Cypress CY15FRAMKIT-002

  • Page 1 CY15FRAMKIT-002 Excelon Ultra QSPI F-RAM Development Kit User Guide Cypress Semiconductor 198 Champion Court San Jose, CA 95134-1709 www.cypress.com...
  • Page 2 Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products.

  • Page 3: Table Of Contents

    CY15FRAMKIT-002 Kit Schematic ........................25 Pin Assignment Table ............................25 Use of Zero-ohm Resistors and No Load ......................28 Bill of Materials (BOM) ............................29 CY15FRAMKIT-002 Board - Jumper Details ....................30 Appendix ..................................31 GUI Menu ................................. 31 Revision History ................................... 34 Document Revision History ............................

  • Page 4: Introduction

    1. Introduction Thank you for your interest in the CY15FRAMKIT-002 FRA-M Kit (DVK). The kit (shield) is designed as an easy-to-use and inexpensive development kit as well as evaluation platform for Cypress’s latest Quad SPI enabled Serial F-RAM. This kit works in conjunction with the NUCLEO-L433RC-P MCU Evaluation Board, a starter kit for ARM® Cortex®-M4-based ST Microelectronics devices.

  • Page 5: Kit Overview

    2. Kit Overview 2.1 CY15FRAMKIT-002 Kit Overview The CY15FRAMKIT-002 can be used to understand the features of the serial F-RAMs (SPI and QSPI). The DVK is an add-on board, which contains a 4-Mbit Excelon -Ultra QSPI F-RAM. It has four connectors that are Arduino UNO- compatible and connect to either ST NUCLEO-L433RC-P MCU Evaluation Board or Arduino UNO R3 board for SPI evaluation.

  • Page 6: Kit Introduction And Configuration Guide

    Do not power the CY15FRAMKIT-002 board through an external power source. The board is designed to be powered by the ST NUCLEO-L433RC-P MCU Evaluation base board. ▪ The CY15FRAMKIT-002 operates from 1.8 V to 3.6 V. Exceeding the maximum voltage limit (3.6 V) can damage the board. Figure 2. F-RAM Device VDD Select Jumper 2.2.2...
  • Page 7 Arduino headers to the ST NUCLEO-L433RC-P MCU Evaluation Board for SPI Interface evaluation – Figure 6 J1, J2, J3 and J4. You can plug the CY15FRAMKIT-002 board onto the ST NUCLEO-L433RC-P MCU Evaluation Board through these connectors. For the schematic, refer to the Appendix on page CY15FRAMKIT-002 DVK, Doc.
  • Page 8 J8 or to Morpho connector by shorting J9 and J8 header through jumper. For the schematic, refer to the Appendix on page Figure 7. Headers to select Arduino or Morpho connector signals CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...
  • Page 9 Appendix on page Figure 8. Debug Header 2.2.8 Test Points The CY15FRAMKIT-002 board provides 3V3, 5V0, 1V8, VSS, and VCC test points as shown in Figure 9. Test Points. These test points are loaded by default. Figure 9. Test Points Table 1.

  • Page 10: F-Ram And Mcu Kit Connection

    -Ultra Quad SPI F-RAM device to evaluate the GQFN package in addition to the default 8-pin SOIC option on the CY15FRAMKIT-002 board. An independent chip select control is provided for the 8-pin GQFN package, which enable access to the second device on the board with an appropriate firmware modification.

  • Page 11: Kit Operation

    STM32L433RC controller as target but can be easily modified to be compatible with any other ST microcontroller with Quad SPI interface. In firmware section of this document, appropriate sections will be highlighted to ensure compatibility with other ST microcontrollers. CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...
  • Page 12 Establish the connection with the STM32 Nucleo board, by connecting CN1 of the Nucleo board to the USB port of the PC Please refer to the guide here to resolve issues related to installation of Nucleo board drivers Figure 13: Connector CN1 for Nucleo 64 board CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...
  • Page 13 The folder Excelon_QSPI contains a MDK-ARM project along with the required source/include files. The Excelon_QSPI/Inc and Excelon_QSPI/Src folders contains header files critical for initializing the QSPI and LPUART modules of the ST controller. The function declarations for accessing Cypress’s QSPI F-RAM are also provided in this folder The files qspiFRAM(.h/.c) provide all the API accesses to the QSPI F-RAM device.
  • Page 14 Update the clock speed to 80.00MHz in Target - Xtal (MHz) On “Debug” page, ST-Link Debugger should get populated automatically if the Nucleo board is plugged into USB port of the computer and the drivers are installed correctly CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...
  • Page 15 10. By default, there will be no Programming Algorithm on first time selection of this controller. 11. Click Add button to open a list of available algorithms. 12. The STM32L433RC MCU has 256Kbytes on On-Chip Flash. Select the appropriate programming algorithm CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...
  • Page 16 (puTTY, uCON etc) and establish a UART connection at 115200 bps with 8-bits message, no parity and 1 stop bit. Appendix on 17. The controller will be waiting for appropriate GUI command. GUI commands will be explained in page 32 CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...

  • Page 17: Quad Spi Configuration For Stm32L433Rc

    “FlashSize” = The default value in test project is 24. The value corresponds to total number of address bits needed to address the memory attached to the interface. The Cypress F-RAM on the kit is a 4Mbit device but has 3-byte addressing. The default value of 24 can remain unchanged in user’s application...
  • Page 18 The Quad SPI interface for this controller is routed to following GPIOs Sr. No. Quad SPI Interface Pin STM32L433RC Pin QUADSPI_CS# PB11 QUADSPI_CLK PB10 QUADSPI_IO0 QUADSPI_IO1 QUADSPI_IO2 QUADSPI_IO3 QUADSPI_IO1 QUADSPI_CS QUADSPI_IO0 QUADSPI_IO2 QUADSPI_CLK QUADSPI_IO3 Figure 15: Quad SPI Pin Assignment on Morpho Connector CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...
  • Page 19 The CY15FRAMKIT-002 board plugs into the Nucleo board. Both Arduino and Morpho connectors need to be plugged in. The QSPI_Init() function also ensures initialization of the controller pins as Quad SPI pins. Figure 16: Pin Initialization as Quad SPI CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...

  • Page 20: Firmware Details

    Cypress Semiconductors. Each function has been supplemented by user comments to help understand the usage. Revision 1.0 of this release covers limited features of the device. The detailed feature set of Cypress’ Quad SPI F-RAM can be found in the device datasheet. The APIs listed here are for enabling easy usage of the Quad SPI F-RAM features and are not an official release of driver support from Cypress Semiconductors.
  • Page 21 It is recommended to leverage the individual register bit manipulation APIs of this driver. void FRAM_WRAR(uint32_t Reg_address, This API updates the register WREN command must be issued prior to executing this API. addressed by “Reg_address” uint8_t *New_Reg_Data); with value pointed “*New_Reg_Data” CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...
  • Page 22 No other register bits are affected by this void FRAM_QUAD_DISABLE(void); Resets the QUAD bit This API is self-sufficient in terms of issues appropriate write enable commands. No other register bits are affected by this CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...

  • Page 23: Appendix

    CY15FRAMKIT-002 Kit Block Diagram F-RAM device ST controller power selection power selection Arduino connector F-RAM Device (SOIC) Arduino connector Morpho Morpho F-RAM Connector Connector Device (GQFN) Arduino connector Arduino Regulator connector Level Shifter CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...

  • Page 24: Cy15Framkit-002 Kit Components Placement

    CY15FRAMKIT-002 Kit Components Placement CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...

  • Page 25: Cy15Framkit-002 Kit Schematic

    SCK / D13 PB13 SCK_A J1_7 J1_8 AVDO J1_9 SDA / D14 J1_10 SCL / D15 Arduino Signal ST Controller Signals CY15FRAMKIT-002 Kit Signals J2_1 J2_2 IOREF J2_3 NRST NRST J2_4 J2_5 J2_6 J2_7 J2_8 CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...
  • Page 26 J11_18 J11_19 J11_20 J11_21 J11_22 SI_I/O0_M J11_23 SHDN#_M J11_24 WP#_I/O2_M J11_25 PB10 SCK_M J11_26 I/O3_M J11_27 PA15 J11_28 J11_29 J11_30 J11_31 J11_32 AGND J11_33 PA12 CS1#_M J11_34 J11_35 PA2/PA9 J11_36 J11_37 PA3/PA10 J11_38 CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...
  • Page 27 PC15 J12_28 J12_29 J12_30 J12_31 J12_32 J12_33 VBAT J12_34 J12_35 J12_36 J12_37 J12_38 Debug Header I/Os Debug Signals J10_1 WP#_I/O2 J10_2 J10_3 J10_4 SI_I/O0 J10_5 J10_6 J10_7 SO_I/O1 J10_8 J10_9 I/O3 J10_10 CS1# CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...

  • Page 28: Use Of Zero-Ohm Resistors And No Load

    Solder R11 which will connect signals from J8 to F-RAM Device (U1, U2) directly Solder R12 which will connect signals from J8 to F-RAM Device (U1, U2) SO_I/O1 directly Solder R13 which will connect signals from J8 to F-RAM Device (U1, U2) SI_I/O0 directly CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...

  • Page 29: Bill Of Materials (Bom)

    Bill of Materials (BOM) CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...

  • Page 30: Cy15Framkit-002 Board - Jumper Details

    Place jumper on J7 and J8 horizontally CY15FRAMKIT-002 Kit Signals (Morpho Signal) J9_1 J8_1 SCK_M J9_2 J8_2 CS#_M J9_3 J8_3 SO_I/O1_M J9_4 J8_4 WP#_I/O2_M J9_5 J8_5 I/O3_M J9_6 J8_6 SI_I/O0_M J9_7 J8_7 CS1#_M J9_8 J8_8 SHDN#_M CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...

  • Page 31: Appendix

    This section is applicable only if user includes guiMENU (.c/.h) files in the project. The APIs written in these files allows for testing the QSPI F-RAM device mounted on the CY15FRAMKIT-002 board by sending commands over the serial interface of controller. On the NUCLEO board, LPUART1 is connected to the virtual COM port and it will be used as the serial interface to communicate with controller.
  • Page 32 Function will fail if user attempts to set latency higher than 15 “803” Prints out current Register Latency setting “804” Updates the Register latency value with new value Function will fail if user attempts to set the latency higher than 3 CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...
  • Page 33 Figure 17: GUI Menu CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...

  • Page 34: Revision History

    Revision History Document Revision History Document Title: ExcelonTM Ultra QSPI F-RAM Development Kit User Guide Document Number: 002-23147 Rev ** Revision Issue Date Origin of Description of Change Change NILE New Spec CY15FRAMKIT-002 DVK, Doc. No. 002-23147 Rev. **...

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