Dma Signals: Dack, Deop, Dreq, Deotx And Iowrx, Iordx - Fujitsu PB-91469G-LS-256BGA User Manual

3.5 DMA Signals: DACK, DEOP, DREQ, DEOTX and IOWRX, IORDX

(JP89 – JP98)
Jumper
JP89
(DACKX0)
DMA
Acknowledge
JP90 (DEOP0)
DMA
termination
output pin
JP91 (DREQ0)
DMA Request
JP92
(DEOTX0)
DMA stop
request
JP93
(DACKX1)
DMA
Acknowledge
JP94 (DEOP1)
DMA
termination
output pin
JP95 (DREQ1)
DMA Request
UG-910022-13
PB-91469G-LS-256BGA V12
Chapter 3 Jumpers
Setting Description
1DACKX0 > V460_DACKX0
1 – 2
V460_DACKX0 > 2DACKX0
2 – 3
4DACKX0 > MCU_D1
4 – 5
MCU_D1 > 5DACKX0
5 – 6
1DEOP0 > V460_DEOP0
1 – 2
V460_DEOP0 > 2DEOP0
2 – 3
4DEOP0 > MCU_E1
4 – 5
MCU_E1 > 5DEOP0
5 – 6
1DREQ0 > V460_DREQ0
1 – 2
V460_DREQ0 > 2DREQ0
2 – 3
4DREQ0 > MCU_C1
4 – 5
MCU_C1 > 5DREQ0
5 – 6
1DEOTX0 > V460_DEOTX0
1 – 2
V460_DEOTX0 > 2DEOTX0
2 – 3
4DEOTX0 > MCU_D2
4 – 5
MCU_D2 > 5DEOTX0
5 – 6
1DACKX1 > V460_DACKX1
1 – 2
V460_DACKX1 > 2DACKX1
2 – 3
4DACKX1 > MCU_E3
4 – 5
MCU_E3 > 5DACKX1
5 – 6
1DEOP1 > V460_DEOP1
1 – 2
V460_DEOP1 > 2DEOP1
2 – 3
4DEOP1 > MCU_F2
4 – 5
MCU_F2 > 5DEOP1
5 – 6
1DREQ1 > V460_DREQ1
1 – 2
V460_DREQ1 > 2DREQ1
2 – 3
4DREQ1 > MCU_E2
4 – 5
MCU_E2 > 5DREQ1
5 – 6
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