Tpa0152 Evm Schematic Diagram - Texas Instruments TPA0152 User Manual

Audio power amplifier evaluation module
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The TPA0152 Audio Power Amplifier Evaluation Module
Figure 3–3. TPA0152 EVM Schematic Diagram
UP
S2
100 kΩ
R4
UP
J4
LV DD
100 kΩ
R2
DOWN
J3
S3
DOWN
L OUT +
L LINE –
C7
0.47 µF
L HP
C8
0.47 µF
V DD
C13
10 µF
GND
C2
0.47 µF
R IN +
L OUT –
C12
0.47 µF
L IN +
C9
0.47 µF
3.2.1
TPA0152 Audio Amplifier IC
The TPA0152 audio amplifier IC (Figure 3–4) is a CMOS device intended
primarily for bridge-tied load (BTL) operation in battery-powered applications.
It is supplied in a very small 24-pin TSSOP thermal surface-mount package
and has been designed to operate from low supply voltages (between
approximately 4.5 V and 5.5 V). Typical applications include portable
computers and multimedia systems.
The IC includes two separate amplifier channels, each of which can operate
in either the bridged-tied load (BTL) mode or the single-ended mode as
selected by the SE/BTL pin. In the BTL mode, the line inputs are automatically
selected and the two output lines of each channel operate as mirror images
of each other for increased power. The speaker load is connected directly
across OUT+ and OUT–, and neither line is connected to ground. BTL
operation provides many benefits, including quadruple the output power of
single-ended operation and no need for bulky output coupling capacitors.
In the single-ended mode, the headphone inputs are automatically selected
and the speaker load is connected between the OUT+ terminal, through an
output coupling capacitor, to system ground. For more information, see the
TPA0152 amplifier IC data sheet, TI Literature Number SLOS246.
3-4
1
24
GND
GND
TPA0152
2
23
UP
RLINEIN
3
22
DOWN
SHUTDOWN
4
21
LOUT+
ROUT+
5
20
LLINEIN
RHPIN
6
19
LHPIN
V DD
7
18
PV DD
PV DD
8
17
RIN
CLK
9
LOUT–
ROUT–
16
10
15
LIN
SE/BTL
11
14
BYPASS
PC–BEEP
12
13
GND
GND
C1
0.47 µF
R1
100 kΩ
LV DD
S1
SHUTDOWN
C3
0.47 µF
C4
0.47 µF
C5
C10
0.1 µF
10 µF
CLK
IN
J2
C6 0.1 µF
PC BEEP
R3
100 kΩ
J1
C11
0.47 µF
LV DD
R LINE –
SHUTDOWN
R OUT +
R HP
V DD
GND
ROUT–
SE/BTL
Details

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